Search - VHDL discrete cosine

[Other resource] dct_p

Description: 这是用VHDL语言(硬件描述语言)写的一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT).全同步设计,低门数.可以用于多媒体及打印应用领域.-VHDL (hardware description language) wrote a two-dimensional 8 * 8 discrete cosine transform (D CT) and the anti-transform (IDCT). fully synchronous design, low gate count. can be used for multimedia and print applications.
Platform: | Size: 32990 | Author: citybus | Hits:

[Other resource] mdct.tar

Description: 这是06年4月刚刚完成的程序，从opencore.org下载而来。用vhdl语言描写，以及matlab仿真，testbench，以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation. -This is April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete cosin e transform implementation designed for use in JPEG compression systems like. Architecture i 's based on parallel distributed arithmetic wit h butterfly computation.
Platform: | Size: 1767014 | Author: 陈朋 | Hits:

[Algorithm] dct_p

Description: 这是用VHDL语言(硬件描述语言)写的一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT).全同步设计,低门数.可以用于多媒体及打印应用领域.-VHDL (hardware description language) wrote a two-dimensional 8* 8 discrete cosine transform (D CT) and the anti-transform (IDCT). fully synchronous design, low gate count. can be used for multimedia and print applications.
Platform: | Size: 32768 | Author: citybus | Hits:

[GDI-Bitmap] DCTdemo

Description: DCT离散余弦变换演示。源代码+测试图片 -DCT discrete cosine transform demonstration. Photo source code testing
Platform: | Size: 199680 | Author: 黄辽 | Hits:

[VHDL-FPGA-Verilog] mdct.tar

Description: 这是06年4月刚刚完成的程序，从opencore.org下载而来。用vhdl语言描写，以及matlab仿真，testbench，以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation. -This is April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete cosin e transform implementation designed for use in JPEG compression systems like. Architecture i 's based on parallel distributed arithmetic wit h butterfly computation.
Platform: | Size: 1767424 | Author: 陈朋 | Hits:

[Graph program] DCT-vhdl

Description: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现-This is a two-dimensional 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realize
Platform: | Size: 10240 | Author: liujl | Hits:

[VHDL-FPGA-Verilog] dct

Description: 离散余弦变换的verilog源代码，经过验证可实现-Discrete cosine transform of Verilog source code can be verified
Platform: | Size: 27648 | Author: 罗伟 | Hits:

[Other] MDCT

Description: MPEG MDCT的一些文章 A design on the vector-processor of MDCT-IMDCT algorithm for digital audio；A fast algorithm of integer MDCT for lossless audio coding-MPEG MDCT articles A design on the vector-processor of MDCT-IMDCT algorithm for digital audio A fast algorithm of integer MDCT for lossless audio coding
Platform: | Size: 5156864 | Author: dingying | Hits:

[VHDL-FPGA-Verilog] vedio

Description: VHDL设计的高速图像采集模块源码，离散余弦变换，图像压缩与编码源码-VHDL design of high-speed image acquisition module source, discrete cosine transform, image compression and encoding source
Platform: | Size: 4096 | Author: | Hits:

[VHDL-FPGA-Verilog] DCT_IDCT

Description: 离散余弦变换及反离散余弦变换的HDL代码及测试文件。包括VHDL及Verilog版本。可用途JPEG及MEPG压缩算法。-Discrete cosine transform and inverse discrete cosine transform of the HDL code and test files. Including VHDL and Verilog versions. And MEPG can use JPEG compression algorithm.
Platform: | Size: 29696 | Author: caesar | Hits:

[VHDL-FPGA-Verilog] dct-code

Description: 离散余弦变换的VHDL实现，不错的代码和方法-Discrete cosine transform VHDL realization of good code and methods
Platform: | Size: 30720 | Author: 宋雪兵 | Hits:

[VHDL-FPGA-Verilog] dct

Description: 用vhdl语言来实现了dct离散余弦变换-With VHDL language to achieve the optimal discrete cosine transform
Platform: | Size: 7168 | Author: yaxin324 | Hits:

[Embeded-SCM Develop] dct2

Description: discrete cosine transforms for embedded systems
Platform: | Size: 17408 | Author: kingtut | Hits:

[Special Effects] TDC_3

Description: This is a matrixl 8 * 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realiz-This is a matrixl 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realiz
Platform: | Size: 1024 | Author: helllano | Hits:

[VHDL-FPGA-Verilog] JPEG

Description: 本文首先介绍了静态图像压缩（JPEG）编码算法的基本原理、压缩的实现过程及其重要过程的离散余弦变换（DCT）算法的实现原理及软件实现的例程，其次着重介绍了压缩过程中的DCT、量化和编码三个重要步骤的实现原理。-This paper describes the static image compression (JPEG) coding algorithm is the basic principle of compression process of the implementation process and its important discrete cosine transform (DCT) Algorithm theory and software implementation of the routines, followed by highlights of the compression process DCT, quantization and encoding steps in the realization of three important principles.
Platform: | Size: 41984 | Author: xuai | Hits:

[Other] 2005-12-29_22-34-9_93

Description: 用ＶＨＤＬ实现dct．离散余弦变换(DCT)在图像编解码方面应用十分广泛,至今已被JPEG、MPEG1、MPEG2、MPEG4和H26x等国际标准所采用。由于其计算量较大,软件实现往往难以满足实时处理的要求,因而在很多实际应用中需要采用硬件设计的DCT处理电路来满足我们对处理速度的要求-Using VHDL implementation dct. Discrete cosine transform (DCT) in image decoding application of very extensive, has been JPEG, MPEG1, MPEG2, MPEG4, and H26x adopted international standards such as. Because of its large amount of calculation, software is often difficult to meet the requirements of real-time processing, which in many practical applications need to use the hardware design of the DCT processing circuits to meet the requirements of our processing
Platform: | Size: 3072 | Author: yangjing | Hits:

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[Other resource] dct_p

[Other resource] mdct.tar

[Algorithm] dct_p

[GDI-Bitmap] DCTdemo

[VHDL-FPGA-Verilog] mdct.tar

[Graph program] DCT-vhdl

[VHDL-FPGA-Verilog] dct

[Other] MDCT

[VHDL-FPGA-Verilog] vedio

[VHDL-FPGA-Verilog] DCT_IDCT

[VHDL-FPGA-Verilog] dct-code

[VHDL-FPGA-Verilog] dct

[Embeded-SCM Develop] dct2

[Special Effects] TDC_3

[VHDL-FPGA-Verilog] JPEG

[Other] 2005-12-29_22-34-9_93

[VHDL-FPGA-Verilog] dct

[VHDL-FPGA-Verilog] DCT

[VHDL-FPGA-Verilog] two_d_dct_serial

[VHDL-FPGA-Verilog] DCT

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