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Description: USB主机和设备的verilog代码，实现了USB1.1协议规范的要求-USB host and equipment Verilog code to achieve the USB 1.1 protocol specification requirements
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Size: 501047 |
Author: 张雷 |
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Description: 包括USB，HOST及DEVICE端源代码，测试平台，文档，非常全。
Platform: |
Size: 701591 |
Author: xiaojian |
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Description:
Platform: |
Size: 500736 |
Author: 张雷 |
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Description:
Platform: |
Size: 701440 |
Author: xiaojian |
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Description: USBHostSlave is a USB 1.1 host and Device IP core.
– Supports full speed (12Mbps) and low speed (1.5Mbps) operation.
– USB Device has four endpoints, each with their own independent FIFO.
– Supports the four types of USB data transfer control, bulk, interrupt, and isochronous
transfers.
– Host can automatically generate SOF packets.
– 8-bit Wishbone slave bus interface.
– FIFO depth configurable via paramters.-USBHostSlave is a USB 1.1 host and Device IP core.
– Supports full speed (12Mbps) and low speed (1.5Mbps) operation.
– USB Device has four endpoints, each with their own independent FIFO.
– Supports the four types of USB data transfer control, bulk, interrupt, and isochronous
transfers.
– Host can automatically generate SOF packets.
– 8-bit Wishbone slave bus interface.
– FIFO depth configurable via paramters.
Platform: |
Size: 6144 |
Author: polito |
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