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[VHDL-FPGA-VerilogUSB 1.1 IP-CORE和设计范例 VHDL源代码

Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
Platform: | Size: 425984 | Author: ken | Hits:

[Communicationusb development

Description: usb 通讯程序源码-usb communication procedures FOSS
Platform: | Size: 6144 | Author: 马腾 | Hits:

[VHDL-FPGA-VerilogUSB接口控制器参考设计_xilinx提供_vhdl

Description: USB接口控制器参考设计,xilinx提供的VHDL源代码-USB interface controller reference design for Xilinx VHDL source code
Platform: | Size: 460800 | Author: 陈旭 | Hits:

[VHDL-FPGA-VerilogUSB控制器VHDL程序

Description: USB控制器VHDL程(usb_xilinx_vhdl),用XILINX公司的FPGA实现-VHDL-USB controller (usb_xilinx_vhdl) XILINX FPGA
Platform: | Size: 60416 | Author: 夏社 | Hits:

[VHDL-FPGA-VerilogUSB IPcore(带说明)

Description: USB IPcoreIP核,包含文档(带说明)-USB IPcoreIP nuclear contains documents (with the note)
Platform: | Size: 408576 | Author: 陈友荣 | Hits:

[BooksVHDL-tutorial

Description: 电子书籍,《VHDL程序设计》清华大学出版社出版,不错的学习教程-electronic books, "VHDL Design" Tsinghua University Publishing House, a good study guide
Platform: | Size: 6480896 | Author: waiyu | Hits:

[Compress-Decompress algrithmsusb(FPGA)

Description: 基于FPGA的usb程序,采用VHDL语言编写。 开发环境为ISE或者MAXPLUS2。-FPGA-based usb procedures, using VHDL language. Development Environment for the ISE or MAXPLUS2.
Platform: | Size: 140288 | Author: 李浩 | Hits:

[VHDL-FPGA-VerilogUSB11112

Description: USB的vhdl代码,具有很强的指导意义,对FPGA进行usb控制很有帮助!-USB vhdl code, which is of great guiding significance. the FPGA control usb helpful!
Platform: | Size: 140288 | Author: 温暖感 | Hits:

[USB developusb

Description: 实现了USB接口。介绍了如何使用VERILOG语言实现USB的程序设计。-Realize the USB interface. Introduce how to use the Verilog language programming USB realize.
Platform: | Size: 140288 | Author: xiexiao | Hits:

[VHDL-FPGA-Verilogusb

Description: 这是个USB 的VHDL 程序,进去直接双击ISE 就可以用了-This is a USB-VHDL procedures, into direct ISE can use double-click the
Platform: | Size: 1644544 | Author: 张亚伟 | Hits:

[USB developUSB

Description: 这个工程是基于FPGA与Philips的D12 USbB 1.1的完整设计,包括VHDL驱动和主机应用程序及驱动-The project is based on FPGA and Philips of the D12 USbB 1.1 complete design, including VHDL-driven and mainframe applications and drivers
Platform: | Size: 2749440 | Author: Phirix Shaw | Hits:

[USB developUSB

Description: fpga设计的usb接口源程序,欢迎指导-FPGA design usb interface source code, welcomed the guidance of
Platform: | Size: 140288 | Author: 陈楠 | Hits:

[VHDL-FPGA-Verilogusb

Description: usb 硬件实现 请大家多多指教-usb hardware realize the exhibitions please everyone
Platform: | Size: 2293760 | Author: qqq | Hits:

[VHDL-FPGA-VerilogUSB

Description: USB源代码,基于VHDL语言编写,在QuartusII上面已验证其功能-USB source code, based on the VHDL language, verified in QuartusII above its function
Platform: | Size: 5120 | Author: | Hits:

[VHDL-FPGA-VerilogUSB

Description: 用VHDL实现的USB IP核,大家可以参考下-Use VHDL to achieve USB IP core, we can refer to the following
Platform: | Size: 1146880 | Author: 蔡飞 | Hits:

[USB developUSB

Description: USB 设计(包括一个参考设计,和标准U盘)-USB design (including a reference design, and standards for U disk)
Platform: | Size: 546816 | Author: zhangsan | Hits:

[VHDL-FPGA-VerilogUSB

Description: USB通信协议的硬件描述语言代码,用于FPGA的总线接口控制器开发-USB communication protocol of the hardware description language code for the FPGA bus interface controller development
Platform: | Size: 140288 | Author: shigengxin | Hits:

[VHDL-FPGA-VerilogUSB

Description: USB的VHDL实现源码(使用VHDL硬件描述语言,通过Altera QuartusII 开发)-USB to achieve the VHDL source code (using VHDL hardware description language, through the development of Altera QuartusII)
Platform: | Size: 50176 | Author: 刘磊 | Hits:

[VHDL-FPGA-VerilogUSB

Description: Verilog实现的USB程序,用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
Platform: | Size: 140288 | Author: Roy | Hits:

[VHDL-FPGA-VerilogUSB

Description: 用VHDL编写实现的USB接口控制器源码,自带testbench,解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
Platform: | Size: 156672 | Author: 陈阳 | Hits:
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