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[VHDL-FPGA-Verilog一个简单的UART

Description: 采用VHDL编写的一个简单的UART-using VHDL prepared a simple UART
Platform: | Size: 3072 | Author: 陈旭 | Hits:

[VHDL-FPGA-Veriloguart from opencores

Description: 用VHDL实现串口 可以实现与pc机的通信 收发 中断都可以 效果比较好-VHDL implement serial port, it can communicate with pc, it can accept and send message, and it can be interrupted.
Platform: | Size: 9216 | Author: 熊明 | Hits:

[DocumentsUART(FPGA)

Description: 基于FPGA的串行通信UART控制器,采用VHDL语言编写,包含多个子模块。 在ISE或FPGA的其它开发环境下新建一个工程,然后将文档中的各个模块程序添加进去,即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new environment, then documentation of the various modules of procedures added to it, will be running simulation. I have been the source of the simulation.
Platform: | Size: 14336 | Author: 李浩 | Hits:

[VHDL-FPGA-Veriloguart-verilog-vhdl

Description: 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
Platform: | Size: 294912 | Author: 刘索山 | Hits:

[VHDL-FPGA-VerilogUart2

Description: uart的VHDL源代码,包括intface.VHD UART_RX_TAB.VHD UART_INT_TB.VHD等-uart VHDL source code, including intface.VHD UART_RX_TAB.VHD UART_INT_TB. Volume etc.
Platform: | Size: 43008 | Author: 罗辉 | Hits:

[Linux-UnixUART

Description: 自己用VHDL写的一个串口程序,调试成功,并且用到了项目中,希望初学者可以借鉴下-Their use VHDL to write a serial program, debug the success of the project and used in the hope that beginners can learn from the next
Platform: | Size: 306176 | Author: yanglei | Hits:

[VHDL-FPGA-Veriloguart

Description: vhdl书写uart代码,经验证功能非常的全.-UART code written in VHDL, experience card features a very wide.
Platform: | Size: 405504 | Author: zjc | Hits:

[VHDL-FPGA-Veriloguart

Description: 串口通讯协议,你您可以自己建个工程,再将需要的VHDL文本,添加到工程中,理解程序在仿真!-Serial communication protocol, you can build your project, and then need VHDL text, added to the project, understand the procedures in the simulation!
Platform: | Size: 10240 | Author: 张亚伟 | Hits:

[VHDL-FPGA-VerilogVHDL-XILINX-EXAMPLE26

Description: [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9--数控分频器][10--4位十进制频率计][11--译码扫描显示电路][12--用状态机实现序列检测器的设计][13--用状态机对ADC0832电路控制实现SIN函数发生器][14--用状态机实现ADC0809的采样电路设计][15--DMA方式A/D采样控制电路设计][16--硬件电子琴][17--乐曲自动演奏][18--秒表][19--移位相加8位硬件乘法器][20--VGA图像显示控制器(彩条)][21--VGA图像显示控制器][22--等精度频率计][23--模拟波形发生器][24--模拟示波器][25--通用异步收发器(UART)][26--8位CPU设计(COP2000)]
Platform: | Size: 3687424 | Author: hawd | Hits:

[Com Portuart

Description: 开源的串口通信程序,用vhdl 编写的,已通过测试,在DE2的开发板上能够运行。-Open source serial communication procedures, prepared by using VHDL, has been tested in the DE2 development board to run.
Platform: | Size: 2048 | Author: caijl88 | Hits:

[VHDL-FPGA-Veriloguart

Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200.
Platform: | Size: 5120 | Author: 陈想 | Hits:

[Com Portuart

Description: this a Uart source code using Verilog.
Platform: | Size: 10240 | Author: Daniel Zhang | Hits:

[VHDL-FPGA-Veriloguart

Description: VHDL编写的异步通信串行口设计用Quartus工具编译-VHDL prepared the design of serial asynchronous communication tool used Quartus compiler
Platform: | Size: 212992 | Author: 朱兆斌 | Hits:

[VHDL-FPGA-VerilogUART

Description: 经典UART程序,通用异步收发器设计的vhdl语言-UART classical procedures, UART VHDL design language
Platform: | Size: 6144 | Author: yu_leo | Hits:

[SCMnew-lins-uart-all

Description: 无私奉献,VHDL 源码,用于实现FPGA上的UART(串口控制器),可以实现FPGA与单片机,PC机的串口通讯。-Selfless dedication, VHDL source code for the FPGA realization of the UART (serial port controller), you can realize FPGA and MCU, PC serial communication machine.
Platform: | Size: 6144 | Author: 骑士 | Hits:

[Communication-Mobileuart

Description: 这个是UART的控制器,已经跑通过,分4个模块,波特率生成、发送、接收和fifo,可供初学者参考-This is the UART controller, has been run through, sub-4 module, baud rate generating, sending, receiving and fifo, for beginners reference
Platform: | Size: 3072 | Author: duan | Hits:

[VHDL-FPGA-Veriloguart

Description: uart的vhdl实现,包含完整quartus工程文件,相信会有较大帮助-uart vhdl quartus
Platform: | Size: 212992 | Author: Carlin | Hits:

[VHDL-FPGA-Veriloguart-vhdl-testbench

Description: simple uart vhdl behavioural model (package) vhdl testbench example
Platform: | Size: 2048 | Author: Mark | Hits:

[VHDL-FPGA-Veriloguart-(VHDL)

Description: 利用VHDL语言实现的UART串口通讯,以经过下载验证-the UART program with VHDL as develop language
Platform: | Size: 11264 | Author: 艾顺义 | Hits:

[VHDL-FPGA-VerilogUART

Description: 这是VHDL编写的UART源码,测试成功,欢饮下载-It is written in UART VHDL source code, the test is successful, Huanyin download
Platform: | Size: 4270080 | Author: teamcen | Hits:
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