Search - UART vhdl code

[Com Port] uart_VHDL

Description: uart的vhdl实现代码分模块设计和状态机设计不错的，用它没错-UART achieve the VHDL code modular design and state machine design good, the right to use it
Platform: | Size: 10240 | Author: 王平 | Hits:

[Windows Develop] edaeda

Description: 完整的串行通信电路vhdl代码，已经通过quartus4.0编译-complete serial communication circuit VHDL code, the compiler has passed quartus4.0
Platform: | Size: 1024 | Author: 鲁东旭 | Hits:

[VHDL-FPGA-Verilog] vhdl-2

Description:
Platform: | Size: 59392 | Author: lileiming | Hits:

[VHDL-FPGA-Verilog] uart-verilog-vhdl

Description: 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
Platform: | Size: 294912 | Author: 刘索山 | Hits:

Description: uart的VHDL源代码，包括intface.VHD UART_RX_TAB.VHD UART_INT_TB.VHD等-uart VHDL source code, including intface.VHD UART_RX_TAB.VHD UART_INT_TB. Volume etc.
Platform: | Size: 43008 | Author: 罗辉 | Hits:

[MPI] uartdesign

Description: 完成VHDL实现UART准确无误码传输.-UART realize the accuracy of the completion of VHDL code transmission.
Platform: | Size: 4096 | Author: bingyu | Hits:

[VHDL-FPGA-Verilog] uart

Description: vhdl书写uart代码,经验证功能非常的全.-UART code written in VHDL, experience card features a very wide.
Platform: | Size: 405504 | Author: zjc | Hits:

[VHDL-FPGA-Verilog] UART232

Description: 本代码是用VHDL语言全面、系统地描述UART通信协议标准，通过对UART进行数据通信的实际运用，能够较全面地理解和掌握VHDL和UART协议。-The VHDL language code is a comprehensive, systematic description of UART communication protocol standards, through the UART to the practical application of data communications, to more fully understand and grasp the VHDL and the UART protocol.
Platform: | Size: 22528 | Author: fengxinya | Hits:

[VHDL-FPGA-Verilog] uart_vhdl

Description: vhdl的异步串口代码，可以方便以致在不同的FPGA中-asynchronous serial VHDL code, can easily result in different FPGA in
Platform: | Size: 18432 | Author: 李冰 | Hits:

[VHDL-FPGA-Verilog] 8051-vhdl-code

Description:
Platform: | Size: 98304 | Author: 周华茂 | Hits:

[Com Port] uart

Description: 开源的串口通信程序，用vhdl 编写的，已通过测试，在DE2的开发板上能够运行。-Open source serial communication procedures, prepared by using VHDL, has been tested in the DE2 development board to run.
Platform: | Size: 2048 | Author: caijl88 | Hits:

[VHDL-FPGA-Verilog] uart

Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200.
Platform: | Size: 5120 | Author: 陈想 | Hits:

[Com Port] uart

Description: this a Uart source code using Verilog.
Platform: | Size: 10240 | Author: Daniel Zhang | Hits:

[VHDL-FPGA-Verilog] uart

Description: VHDL编写的异步通信串行口设计用Quartus工具编译-VHDL prepared the design of serial asynchronous communication tool used Quartus compiler
Platform: | Size: 212992 | Author: 朱兆斌 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 串口实验，很好用，我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
Platform: | Size: 338944 | Author: 韩思贤 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用VHDL编写实现的UART控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the UART controller, bring their own testbench, after decompression project file can be opened with the ISE.
Platform: | Size: 25600 | Author: 陈阳 | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[Com Port] uart_VHDL

[Windows Develop] edaeda

[VHDL-FPGA-Verilog] vhdl-2

[VHDL-FPGA-Verilog] uart-verilog-vhdl

[VHDL-FPGA-Verilog] Uart2

[MPI] uartdesign

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UART232

[VHDL-FPGA-Verilog] uart_vhdl

[VHDL-FPGA-Verilog] 8051-vhdl-code

[Com Port] uart

[VHDL-FPGA-Verilog] uart

[Com Port] uart

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] uart-

CodeBus www.codebus.net