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[DSP programDTK-IO

Description: 数字I/O实验主要完成的功能: 在此实验中,SEED-DEC5416 首选进行初始化,包括对外设 UART、本身频率的设定及一些状态区的初始化。然后等待 SEED-MMI5402 发送命令;SEED-DEC5416 响应交通灯自动模式、交通灯手动手动模式、交通灯东西通、交通灯南北通、及交通灯的禁行与夜间模式的操作命令。同时还响应,对 SEED-DEC5416 的复位及两个单元之间的通讯故障。 -Digital I/O completion of the experiment the main features: In this experiment, SEED-DEC5416 preferred to initialize, including peripherals UART, their frequency settings and some of the initialization state of the district. SEED-MMI5402 and then wait to send commands SEED-DEC5416 automatic mode in response to traffic lights, traffic lights manual manual mode, the traffic light east-west pass, pass traffic lights north and south, and traffic lights at night and cut-line mode command. At the same time, also responded to the SEED-DEC5416 reset and communication between two modules fault.
Platform: | Size: 222208 | Author: sylivian | Hits:

[VHDL-FPGA-Verilogtraffic

Description: xilinx完成一个模拟的十字路口交通信号灯,主干道上的绿灯时间为30s,支干道的绿灯时间为30s,且交通灯从绿变红时,有6s黄灯亮的时间间隔。当然每种状态的倒计时的时间值应显示到LED数码管上。-Xilinx completed in a simulated traffic lights at a crossroads, a main road on the green time for the 30s, branch roads green time for 30s, and red traffic lights from green when 6s yellow light time interval. Of course, each state s countdown time value should be shown on the LED digital tube.
Platform: | Size: 95232 | Author: haolj | Hits:

[VHDL-FPGA-Verilogtraffic

Description: Light traffic by xilinx
Platform: | Size: 410624 | Author: mohab | Hits:

[VHDL-FPGA-Veriloghonglvdeng

Description: Verilog HDL作为一种规范的硬件描述语言,被广泛应用于电路的设计中。他的设计描述可被不同的工具所支持,可用不同器件来实现。利用Verilog HDL语言自顶向下的设计方法设计交通灯控制系统,使其实现道路交通的正常运转,突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点,并通过Xilinx ISE6.02和ModelSim5.6完成综合、仿真。此程序通过下载到FPGA芯片后,可应用于实际的交通灯控制系统中。-Verilog HDL as a standard hardware description language, is widely used in circuit design. Description of his design can be supported by different tools, different devices can be used to achieve. Using Verilog HDL language top-down design approach traffic light control system to achieve the normal operation of road transport, highlighting its good as a hardware description language, readability, portability and ease of understanding, etc., and completed by Xilinx ISE6.02 and ModelSim5.6 synthesis, simulation. Through this program downloaded to the FPGA chip, can be applied to the actual traffic light control system.
Platform: | Size: 1024 | Author: zhaomin | Hits:

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