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Description: USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
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Size: 181248 |
Author: 林风 |
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Description: sopc中内建的逻辑分析仪,nios中分析波形的好工具-sopc built-in logic analyzer, nios waveform analysis tool for the
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Size: 47104 |
Author: |
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Description: 这是一ＡＬＴＥＲＡ公司的培训内容，大家看看了，尤其参加ＳＯＰＣ竞赛的-Altera Corporation contents of the training, we look at, especially to participate in the contest SOPC
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Size: 1750016 |
Author: feng |
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Description: user_logic_VGA_Controller，适合于DE2开发板，把这个文件夹放在工程目录之中，就可以在SOPC里直接添加VGA_Controller IP核了，很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added directly SOPC Lane VGA_Controller IP core, very convenient to use.
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Size: 70656 |
Author: 曾 |
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Description: 西北工业大学altera竞赛培训资料，内容包括整个altera niosii 的软硬件开发流程和详细实例，是学习sopc不可多的好资料-Northwest Industrial University ALTERA race training materials, contents include the entire ALTERA niosii the hardware and software development processes and detailed examples, is it not better to learn sopc good information
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Size: 5891072 |
Author: 阿必 |
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Description: 这是一个关于NIOS2嵌入式CPU,尜加UART的技术文档,对天SOPC BUILDER认识的人一看就明白啦.-on NIOS2 embedded CPU, UART chung increase the technical documentation, BUILDER days SOPC right people who know at first understood.
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Size: 173056 |
Author: dddd |
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Description: FPGA&SOPC快速入门教程V2.03(感觉不错-FPGA
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Size: 2038784 |
Author: 陈强 |
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Description: 本书主要介绍Altera公司的软核CPU——nios和采用该CPU进行嵌入式系统设计的流程与方法。并以此为着眼点，介绍Altera的片上可编程系统SOPC的设计原理与实践技术，引领读者在低投入的情况下，较快地进入片上系统soc的殿堂。
-This book introduces the Altera s soft-core CPU- nios and the use of the CPU for embedded system design process and methods. As the focus on Altera s programmable system chip SOPC design principle and practice of technology, leading the reader in the case of low-input, fast access to system-on-chip soc hall.
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Size: 8742912 |
Author: 阿康 |
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Description: 通过一个实例，详细介绍了如何在Excalibur平台上实现一个基于NIOS的SOPC设计。-through an example, Details on how the Excalibur platform to achieve a NIOS based SOPC design.
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Size: 188416 |
Author: 阿康 |
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Description: 讲述以ALTERA公司的FPGA为核心，基干SOPC技术的嵌入式攒像机的设计-described in the company Altera FPGA as the core, SOPC skeleton embedded bloggers like Machine Design
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Size: 130048 |
Author: 阿康 |
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Description: quartus II-sopc builder avalon总线LCD控制IPCORE-quartus II-sopc builder avalon Bus LCD controller IP CORE
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Size: 26624 |
Author: 张建 |
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Description: IIC控制器 for Sopc Builder-IIC controller for Sopc Builder
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Size: 12288 |
Author: 张建 |
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Description: UART RS232 IPCORE for sopc builder
-RS232 UART IPCORE for sopc builder
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Size: 111616 |
Author: 张建 |
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Description: Avalon Bus的参考手册.对做nios的sopc的人很有参考价值.-Avalon Bus reference manual. To do the Nios SOPC people could very well refer.
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Size: 1409024 |
Author: 张大海 |
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Description: 一个数码管的驱动IP for SOPC BUILDER. 是学习SOPC的一个参考范例.-one of the driving digital IP for SOPC BUILDER. Learning is a Senate SOPC Examples examination.
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Size: 2048 |
Author: 张大海 |
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Description: sopc串口测试程序，能够通过串口调试精灵对其进行测试-sopc serial testing procedures, through its serial debugging Wizard test
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Size: 1024 |
Author: 赵阳 |
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Description: 潘松老师写的一本关于sopc实用教程的图书，包括quartus的使用，基于dspbuilder＆matlab的现代dsp设计以及nios嵌入式系统开发等内容，非常不错的一本图书。-Pan Song written by a teacher on the SOPC Practical Guide books, including the use of Quartus, based on the dspbuilder
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Size: 38735872 |
Author: 可难 |
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Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决
不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。
-2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
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Size: 407552 |
Author: 刘斐 |
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Description: Avalon altera pwm generator. Directly use in SOPC.
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Size: 1024 |
Author: Davide Merlani |
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