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[Internet-Network] nrzi

Description: NRZ inverted encoder & decoder for Quartus compiler only
Platform: | Size: 1024 | Author: kkris | Hits:

[VHDL-FPGA-Verilog] hdbn_latest.tar

Description: This “core” is actually two cores – an HDB3/HDB2/B3ZS Encoder that converts NRZ data into P and N pulses according to ITU-T G.703, and a HDB3/HDB2/B3ZS Decoder that converts P and N pulses into NRZ data according to ITU-T G.703.
Platform: | Size: 199680 | Author: chaitanya | Hits:

[VHDL-FPGA-Verilog] hdbn_latest.tar

Description: This “core” is actually two cores – an HDB3/HDB2/B3ZS Encoder that converts NRZ data into P and N pulses according to ITU-T G.703, and a HDB3/HDB2/B3ZS Decoder that converts P and N pulses into NRZ data according to ITU-T G.703.
Platform: | Size: 198656 | Author: Viktor | Hits:

[Game Program] nrzi

Description: NRZ inverted encoder & decoder for Quartus compiler only
Platform: | Size: 1024 | Author: urityan | Hits:

[VHDL-FPGA-Verilog] hdbn

Description: This “core” is actually two cores – an HDB3/HDB2/B3ZS Encoder that converts NRZ data into P and N pulses according to ITU-T G.703, and a HDB3/HDB2/B3ZS Decoder that converts P and N pulses into NRZ data according to ITU-T G.703. Note: HDB2 and B3ZS are different names for the same encoding. HDB3 is typically used to encode data at 2.048 (E1), 8.448 (E2) and 34.368Mb/s (E3) B3ZS is typically used to encode data at 44.736Mb/s (T3)
Platform: | Size: 9216 | Author: fronders | Hits:

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