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[Compress-Decompress algrithms] DDR2_sdram

Description: DDR2 的控制器，它是由LATTICE的编译器生成。-DDR2 controller, it is by the compiler-generated LATTICE.
Platform: | Size: 966656 | Author: 李国 | Hits:

[VHDL-FPGA-Verilog] ddr2sdram_spartan3s700an.tar

Description: It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit- Diligent fully working.
Platform: | Size: 1488896 | Author: under | Hits:

[Embeded-SCM Develop] ddr_ddr2_sdram

Description: 基于NIOS II的ddr2控制器,配有详细的文档,经验证后可使用.-NIOS II based on the DDR2 controller, equipped with detailed documentation, the experience can be used after certification.
Platform: | Size: 3486720 | Author: Jackie | Hits:

[Other] Micron_DDR

Description: DDR2 SDRAM 颗粒初始化以及读写操作时序-Particles as well as the DDR2 SDRAM initialization timing to read and write operations
Platform: | Size: 432128 | Author: robert.wang | Hits:

[VHDL-FPGA-Verilog] Xil3SD1800A_MIG_simplifiedUI_vlog_v92

Description: verilog 实现的spartan 3A dsp start kit DDR2 SDRAM 控制器-verilog achieved spartan 3A dsp start kit DDR2 SDRAM controller
Platform: | Size: 908288 | Author: ma yirong | Hits:

[Documents] ddr2_sdram_controller

Description: 关于DDR2 SDRAM 控制器的相关论文资料-ddr2_sdram_controller
Platform: | Size: 5675008 | Author: 王颖伟 | Hits:

[VHDL-FPGA-Verilog] c_xapp454

Description: 这是xilinx应用指南xapp454的中文版本。本应用指南说明与 Micron DDR2 SDRAM 器件连接时，Spartan™ -3 器件中 DDR2 SDRAM 存储器接口的实现。本文档先简单介绍了 DDR2 SDRAM 器件的特性，然后对 DDR2 SDRAM 存储器接口的实现进行了详细说明。-This is the xilinx application note xapp454 the Chinese version. This application note and the Micron DDR2 SDRAM device is connected, Spartan ™ -3 devices DDR2 SDRAM memory interface implementation. This document briefly describes the DDR2 SDRAM device features, and then the realization of DDR2 SDRAM memory interface is described in detail.
Platform: | Size: 217088 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilog] ddr2_sdram_latest[1].tar

Description: ddr2 sdram 控制器的vhdl源码,并包括了ddr2 sdram芯片的仿真模型-DDR2 sdram controller VHDL source code and ddr2 sdram simulation module
Platform: | Size: 1779712 | Author: hxr | Hits:

[VHDL-FPGA-Verilog] ddr3

Description: VHDL code sample.this files is the VHDL code for using of DDR3 and DDR2 SDRAM.
Platform: | Size: 7168 | Author: homan | Hits:

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