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[VHDL-FPGA-Verilog结合XILINXCPLD RS232通信(verilog)

Description: 结合XILINXCPLD所做的模拟RS232通信verilog源程序-XILINXCPLD combine the simulation RS232 communication Verilog source
Platform: | Size: 121856 | Author: 于飞 | Hits:

[VHDL-FPGA-Verilog能综合的YCrCb2RGB模块(verilog)_采用3级流水线

Description: 能综合的YCrCb2RGB模块(verilog)_采用3级流水线,用fpga做小数运算,还有就是流水线技术 -can YCrCb2RGB integrated module (Verilog) _ used three lines, they simply do with fractional arithmetic, there is pipelining technology
Platform: | Size: 1024 | Author: 于飞 | Hits:

[Communicationcrc上传程序

Description: 写CRC编解码程序时,整理的文件,压缩文件既有理论说明,也有源代码。源代码格式用C,VHDL,Verilog。-write CRC codec procedures, collating documents, compressed files both theoretical statements, and the active code. Source code format C, VHDL, Verilog.
Platform: | Size: 706560 | Author: cdl | Hits:

[VHDL-FPGA-VerilogCRC-Verilog

Description: 此是进行循环冗余效验的Verilog编码,适合多种标准,如CRC16-this Cyclic Redundancy is well-tested Verilog code for a variety of criteria, such as CYXLIC REDUNDANCY
Platform: | Size: 3072 | Author: 藏瑞 | Hits:

[VHDL-FPGA-Verilogfast-crc.tar

Description: 一个verilog实现的crc校验,用于fpga实现,快速,准确有效-A Verilog realize the CRC checksum for the FPGA realization, rapid, accurate and effective
Platform: | Size: 1440768 | Author: 枫叶鹏 | Hits:

[VHDL-FPGA-Verilogcrc

Description: 用Verilog编写crc校验码,包括8位,12位,16位,32位,非常实用-Prepared using Verilog CRC check codes, including 8, 12, 16, 32, a very practical
Platform: | Size: 11264 | Author: asd | Hits:

[Crack Hackcrc

Description: 用于10M,100M,1000M以太网的并行CRC算法,有别于一般的CRC算法。verilog描述-For 10M, 100M, 1000M Ethernet parallel CRC algorithm, the CRC algorithm is different from the ordinary. Verilog Description
Platform: | Size: 1024 | Author: winwalk | Hits:

[RFIDcrc

Description: rfid中crc模块的verilog代码-err
Platform: | Size: 1024 | Author: yan zeng | Hits:

[VHDL-FPGA-VerilogCRC

Description: verilog 实现循环冗余校验 源代码-Cyclic Redundancy Check realize Verilog source code
Platform: | Size: 367616 | Author: 长空 | Hits:

[Crack HackA-PAINLESS-GUIDE-TO-CRC-ERROR-DETECTION-ALGORITHMS

Description: A PAINLESS GUIDE TO CRC ERROR DETECTION ALGORITHMS CRC校验理论与实践的经典教程,Ross写的。-A PAINLESS GUIDE TO CRC ERROR DETECTION ALGORITHMS CRC checksum of the classic theory and practice tutorials, Ross wrote.
Platform: | Size: 184320 | Author: haoz | Hits:

[Crack Hackcrc

Description: 这是CRC字符串校验的源码,可对字符串校验后输出校验码-This is the CRC checksum of the source string can be output after the string checksum validation code
Platform: | Size: 195584 | Author: ch | Hits:

[Crack HackCRC

Description: Verilog写的 CRC 编码-CRC code written in Verilog
Platform: | Size: 1024 | Author: 孔祥 | Hits:

[Crack Hackcrc

Description: CRC校验码的实现,校验码6位,寄存器串行实现方式,经项目实际验证正确-CRC Check Code realization Check 6, register serial ways, the right to verify the actual project
Platform: | Size: 1024 | Author: fang | Hits:

[Embeded-SCM DevelopCRC

Description: CRC和线性码程序 可能对初级学习有用 希望能够好好利用-CRC
Platform: | Size: 30720 | Author: 黄金刚 | Hits:

[Program docCRC

Description: 详细介绍了循环冗余校验CRC(Cyclic Redundancy Check)的差错控制原理及其算法实 现。-Details of Cyclic Redundancy Check CRC (Cyclic Redundancy Check) theory and the error control algorithm.
Platform: | Size: 106496 | Author: elunlang2000 | Hits:

[Othercrc

Description: verilog crc source code
Platform: | Size: 1024 | Author: aa45646 | Hits:

[VHDL-FPGA-Verilogcrc-gen

Description: CRC Generator is a command-line application that generates Verilog or VHDL code for CRC of any data width between 1 and 1024 and polynomial width between 1 and 1024. The code is written in C and is cross-platform compatible
Platform: | Size: 60416 | Author: badfox | Hits:

[VHDL-FPGA-VerilogCRC-Generator-for-Verilog-or-VHDL

Description: CRC Generator for Verilog or VHDL-CRC Generator for Verilog or VHDL
Platform: | Size: 3072 | Author: wz | Hits:

[VHDL-FPGA-Verilogcrc

Description: CRC编程源程序,使用Verilog硬件编程语言进行编程-CRC program source code, Verilog hardware programming language used to program
Platform: | Size: 1024 | Author: zhaoyf | Hits:

[VHDL-FPGA-Verilogcrc

Description: For implementing the CRC in verilog or VHDL
Platform: | Size: 100352 | Author: test | Hits:
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