Description: 个人编写的关于积梳状滤波器的程序,用于抽取和插值时防止信号失真.-individuals prepared on the plot comb filter procedures for taking and the interpolation to prevent signal distortion. Platform: |
Size: 1024 |
Author:zj |
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Description: verilog码写的CIC滤波器的程序,包括4倍抽取CIC滤波器和内插的CIC滤波器两个-Verilog code written by CIC filter procedures, including 4 times the extraction CIC filter and the CIC interpolation filter two Platform: |
Size: 22528 |
Author:桃子 |
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Description: 首先介绍了内插理论和CIC 滤波器原理,重点给出了CIC 滤波器设计方法,并分析了CIC 滤波器级联级数
和滤波器阶数的选取对通带衰减和旁瓣抑制的影响,仿真结果验证了设计方法的有效性和可行性。-First introduced the theory and CIC interpolation filter, the focus is given CIC filter design methods, and analyzes the CIC filter and filter cascading series of the selected order of the pass-band attenuation and the effects of sidelobe suppression, The simulation results show the design method is effective and feasible. Platform: |
Size: 203776 |
Author:会飞的鱼 |
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Description: 单级CIC2倍内插滤波器,用verilogHDL实现-CIC2 times the single-stage interpolation filter, used to achieve verilogHDL Platform: |
Size: 498688 |
Author:Carl |
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Description: 利用matlab,实现插值滤波器的设计 有需要的朋友可以-Using matlab, realize the design of interpolation filters can have a friend in need Platform: |
Size: 1024 |
Author:caidan |
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Description: 用matlab设计一个抽取率为2的CIC抽取滤波器和插值率为2的插值滤波器-Using matlab to design a decimation rate of 2 of the CIC decimation filter and interpolation rate of 2 of the interpolation filter Platform: |
Size: 1024 |
Author:viper09 |
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Description: 4阶CIC内插滤波器,内插系数64,Verilog版本,数字下变频-4-order interpolating CIC filter interpolation factor of 64, Verilog version of the digital down-conversion Platform: |
Size: 1024 |
Author:王刚 |
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Description: 3级CIC抽取,内插滤波,r为抽取因子,n为原始信号的采样点数,x为原始信号序列 y为抽取滤波后的输出序列-3 CIC decimation, interpolation filter, r for the extraction factor, n the sampling points for the original signal, x is the original signal sequence y to extract the filtered output sequence Platform: |
Size: 1024 |
Author:wangsha |
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Description: 实现了2级cic滤波器的功能,其中内插32倍,即实现了32倍的2级cic内插滤波器-Realize the level 2 cic filter function, including 32 times interpolation i.e. the 32 times the level 2 cic interpolation filter
Platform: |
Size: 2048 |
Author:李小白 |
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Description: CIC补偿滤波器设计源代码,包含量化功能,可以作为FPGA开发滤波器设计数据。适用于CIC抽取和CIC插值滤波器的补偿滤波器应用。-CIC compensation filter design source code, including the quantization function can be used as a the FPGA development filter design data. Apply to CIC decimation filter compensation and CIC interpolation filter applications. Platform: |
Size: 1024 |
Author: |
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Description:
在altera平台用verilog硬件描述语言实现cic插值滤波,在modelsim软件中仿真通过,包含完整的工程代码,可以直接下载到FPGA中运行-In the Altera platform using Verilog hardware description language CIC interpolation filter, through the simulation in Modelsim software, including the complete project code, can be directly downloaded to the FPGA operation
Platform: |
Size: 1086464 |
Author:汪少锋 |
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Description: 多级插值CIC滤波器,3级、过采样率为2的8位CIC插值滤波器,系统工作时钟的频率是数据速率的2倍
-Multi-stage interpolation CIC filter 3, an oversampling ratio of eight CIC interpolating filter, the operation clock frequency of the system 2 is twice the data rate Platform: |
Size: 1024 |
Author:刘六 |
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