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[BooksVHDLCIC

Description: 台湾国家晶元设计中心VHDL内部培训资料(CIC)-crystal yuan of Taiwan Design Center VHDL internal training materials (CIC)
Platform: | Size: 3020800 | Author: 20032211 | Hits:

[MiddleWarecic4

Description: cic 4 stages vhdl code
Platform: | Size: 1024 | Author: dehua | Hits:

[VHDL-FPGA-VerilogCICdeVHDL

Description: 本人编写的3级抽取器的vhdl代码,可供大家参考一下,如有不妥之处,还请多多指教.-I prepared three Extractor of VHDL code, available for reference for everyone and, if inappropriate, also requested the exhibitions.
Platform: | Size: 1024 | Author: 谢白玉 | Hits:

[VHDL-FPGA-VerilogDecimationFilterDesignforDDCandImplementingItwithF

Description: 本文介绍了在数字下变频(DDC) 中的抽取滤波器系统设计方法和具体实现方案。采用CIC 滤波器、HB 滤波器、FIR 滤波器三级级联的方式来降低采样率。通过实际验证,证明了设计的可行性-This article describes the digital down conversion (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of the design
Platform: | Size: 468992 | Author: 会飞的鱼 | Hits:

[Communication-Mobilecic3_decimator

Description: 积分梳状滤波器(CIC)设计,已经通过验证。-Integral comb filter (CIC) design, has been validated.
Platform: | Size: 1024 | Author: 123 | Hits:

[VHDL-FPGA-Verilogyl_cic32

Description: 一个三阶梳妆滤波器(CIC)的vhdl的源码-Dressing a third-order filter (CIC) of the VHDL source code
Platform: | Size: 1024 | Author: 白杨 | Hits:

[Communication-MobileCIC

Description: CIC梳妆滤波器生成器,生成任意位数任意长度的CIC滤波器源代码-Dressing CIC filter generator to generate any arbitrary length of the median of the CIC filter source code
Platform: | Size: 134144 | Author: lizhizhou | Hits:

[VHDL-FPGA-VerilogCIC

Description: 台湾国家晶元设计中心VHDL内部培训资料(CIC).pdf-Taiwan
Platform: | Size: 2984960 | Author: 张贺寅 | Hits:

[VHDL-FPGA-Verilogcic_dec_8_three

Description: cic_dec_8_three CIC 文件的VHDL-cic_dec_8_threeCIC documents VHDL
Platform: | Size: 1024 | Author: ouyang | Hits:

[VHDL-FPGA-Verilogtdmddc_v61

Description: Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1
Platform: | Size: 54272 | Author: | Hits:

[VHDL-FPGA-Verilogcic-simo

Description: 用于dspbuilder 可以直接生成vhdl源码,或者verilog源码-用于dspbuilder ?梢灾 ??由??蓈hdl?
Platform: | Size: 39936 | Author: wq | Hits:

[VHDL-FPGA-VerilogCIC

Description: cpld/fpga积分梳状滤波器(CIC)设计-cpld/fpga Integral comb filter (CIC) design
Platform: | Size: 1024 | Author: 陈臣 | Hits:

[VHDL-FPGA-Verilogc19_CICfilter

Description: 精通verilog HDL语言编程源码之5--CIC积分梳状滤波器设计-Proficient in verilog HDL source language programming of 5- CIC Integrator Comb Filter Design
Platform: | Size: 1024 | Author: 李平 | Hits:

[matlabcic

Description: 五阶CIC梳状积分滤波器,可以综合,非常有参考价值-Fifth-order CIC points comb filter, can be integrated and very useful
Platform: | Size: 760832 | Author: shirley | Hits:

[source in ebookcic512

Description: 5阶cic滤波器,抽取12倍,的verilog程序,已经通过仿真验证,一、具有很高的速率-5-order CIC filter, collected 12 times the Verilog procedures are by simulation, one with a very high rate
Platform: | Size: 1024 | Author: xiebin | Hits:

[VHDL-FPGA-VerilogCIC_deci4

Description: cic抽取滤波器ip核,用于射频采样数字下变频模块的核心数字信号处理部分.此ip核已经过ise10.2验证-CIC decimation by 4 filter,used in Direct RF sampling of GPS signal. the core dsp block in a frondend design
Platform: | Size: 31744 | Author: mimidabuda | Hits:

[Communication-MobileCIC

Description: CIC梳状滤波器verilog源码,包括积分器,下抽级以及梳状滤波器三个部分。-CIC comb filter verilog source code, including the integrator, under the pump, as well as comb filter class is in three parts.
Platform: | Size: 1024 | Author: 张佳培 | Hits:

[VHDL-FPGA-VerilogCIC

Description: Efficient CIC filter Implementation using VHDL
Platform: | Size: 3072 | Author: Mahadevan | Hits:

[VHDL-FPGA-Verilogcic

Description: 一个很好的CIC滤波程序!可以直接使用!-CIC filter a very good program!
Platform: | Size: 31114240 | Author: 卿华 | Hits:

[OtherCIC VHDL language

Description: 台湾国家芯片系统中心专用教程,陈献文著作(taiwan CIC advanced VHDL course)
Platform: | Size: 2917376 | Author: fengyelin126 | Hits:
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