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介绍异步FIFO的基本结构以及设计要点。
Date : 2010-11-29 Size : 532.7kb User : ilove314

最经典的FIFO原理.pdf
Date : 2011-04-25 Size : 532.72kb User : xiaofeng881105

PCI驱动编程实例,通过PCI可实施操作: 2、通过DMA方式往SDRAM写数据的步骤: (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写2 3、通过DMA方式从SDRAM读数据的步骤: (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写3 -PCI-driven programming examples, can be implemented through the PCI operation : 2, DMA SDRAM write data to the steps : (a) to transfer data OMB1 write the number (2) to OMB2 was to be visited SDRAM Address (3) to FIFO write 2 3 through DMA side SDRAM-time data from the steps : (a) to transfer data OMB1 write the number (2) to OMB2 was to be visited SDRAM Address (3) to write FIFO 3
Date : 2025-12-21 Size : 61kb User : 葛琳

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something maybe helpful for hardware programmer
Date : 2025-12-21 Size : 1.11mb User : jiayanli

本文将介绍基于EZ-USB FX2系列CY7C68013芯片的高速数据采集系统的设计,该系统具有限幅保护功能,固件和驱动程序的编写简便,能够完成对数据的高速采集和传送。 -This article will introduce based on the EZ-USB FX2 Series CY7C68013 chip high-speed data acquisition system design, the system has a limiter protection, firmware and drivers to prepare simple, able to complete high-speed data acquisition and transmission.
Date : 2025-12-21 Size : 45kb User : 盗匪

fifo vhdl源码,高可靠性,带有格雷码同步,有需要可依进行参考!-fifo vhdl source, high reliability, with Gray-code synchronization, there is a need-based reference!
Date : 2025-12-21 Size : 3kb User : lee

This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the computer networking industry to receive data at a particular frequency and transmit them at another frequency. An asynchronous FIFO has two different clocks: one for read and one for write.-Asynchrinous FIFO design
Date : 2025-12-21 Size : 10kb User : MingCheng

基于USB接口Slave FIFO模式的核谱数据采集研究  -Slave FIFO Interface USB-based model study of nuclear spectroscopy data acquisition
Date : 2025-12-21 Size : 3.82mb User : 三米

cy7c68013工作在SLAVE FIFO下的FPGA源代码,已经通过,Verilog编写-cy7c68013 slave fifo mode code ,written by hard ware language
Date : 2025-12-21 Size : 2.05mb User : 杨瑞

a UART model with FIFO buffer, design with verilog
Date : 2025-12-21 Size : 142kb User : quang

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操作系统FIFO页面置换算法实现VC6.0源码-FIFO page replacement algorithm for the operating system source code to achieve VC6.0
Date : 2025-12-21 Size : 2kb User :

A7125经典例程,学习无线通讯的好资料。-A7125 classic routines, learning good information on wireless communication.
Date : 2025-12-21 Size : 7kb User : 琴瑟蓝天

转载JSQ网络的算法文章,对这个领域深入学习很有帮助-DECAY OF TAILS AT EQUILIBRIUM FOR FIFO JOIN THE SHORTEST QUEUE NETWORKS By Maury Bramson,Yi Lu Balaji Prabhakar
Date : 2025-12-21 Size : 344kb User : 付煜

里面用c语言写的fifo摄像头资料程序和一些文档,说明如何使用fifo摄像头-fifo video material with c language
Date : 2025-12-21 Size : 3.49mb User : gaoxinglong

fifo头参考资料,可用来参考写ov7670的驱动代码-the fifo head reference materials that can be used to refer to the write ov7670 drive code
Date : 2025-12-21 Size : 523kb User : 杨宇锋

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经典异步fifo代码The classic asynchronous FIFO code-The classic asynchronous FIFO code
Date : 2025-12-21 Size : 99kb User : jiangjie

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一本详细介绍了FPGA编程中常用的FIFO模块的使用方法以及详细解释,外国大牛写的,很有参考意义。-A detailed introduces the method of using FIFO module used in FPGA programming and explain in detail, foreign Daniel wrote, of great reference significance.
Date : 2025-12-21 Size : 549kb User : 阳松

This paper presents one of the features of DS (Differentiated Services) architecture, namely the queuing or congestion management. Packets can be placed into separate buffer queues, on the basis of the DS value. Several forwarding policies can be used to favor high priority packets in different ways. The major reason for queuing is that the router must hold the packet in its memory while the outgoing interface is busy with sending another packet. Our main goal is to compare the performance of the following queuing mechanisms: FIFO (First- In First-Out), CQ (Custom Queuing), PQ (Priority Queuing), WFQ (Weighted Fair Queuing), CBWFQ (Class Based Weighted Fair Queuing) and LLQ (Low Latency Queuing).
Date : 2025-12-21 Size : 793kb User : muhand

针对CY7C68013在SLAVE FIFO 模式下读写Verilog源代码-For CY7C68013 in the SLAVE FIFO mode to read and write Verilog source code
Date : 2025-12-21 Size : 1.14mb User : 王大锤

British Isles spiders, a subspecies of Urban Spiders, can also live in the mouth cavities of British citizens since the bits of semi-digested foodstuffs that these spiders crave are abundant between the Brit's never-brushed teeth. These spiders have the shortest lifespans (usually one day), the saddest lives, and the smallest sizes. Spiders in India usually feed off of small children and unlucky pensioners who happen to wander past, and then up into, their silk webs.
Date : 2025-12-21 Size : 189kb User : tomnaco
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