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[MiddleWare] Xilinxopensourcecode DL : 0: xilinx公司的开放的源码，很有参考价值，其中有ddl，fifo控制等。-xilinx?? ?? ??? ?? ????? ? вο ????? ? ? ?ddl?? fifo? ? ? ??
Date : 2025-12-22 Size : 12kb User : 杨奋燕
[MiddleWare] controlpannel DL : 0: usb slavefifo 模式控制传输，控制接口，包括全部的源代码-usb slavefifo mode control transmission, control interface, including all the source code
Date : 2025-12-22 Size : 1.84mb User :
[MiddleWare] uart DL : 0: 基于verilogHDL实现的UART收发，带FIFO缓存。-UART transceiver, with a FIFO buffer.
Date : 2025-12-22 Size : 324kb User : 张三
[MiddleWare] FifoinFIFO DL : 0: systemc实现的一个fifo，对想要学习systemc的同学很有帮助哦-A fifo systemc achieved, the students want to learn systemc helpful oh
Date : 2025-12-22 Size : 43kb User : 柏承双