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[VHDL-FPGA-Verilog] 经典高速乘法器IP DL : 0: 乘法器是硬件设计中的很常见也很重要的一个模块，它的VHDL硬件实现很好的解决了软件编程中做乘法速度慢的问题，在实时高速系统应用中或DSP软核或数字信号处理硬件实现算法中，经常能使用到乘法器，所以经典的高速乘法器IP 很有参考价值-Multiplier is a common and important module in hardware designing.Its VHDL addresses the low speed of multiplication in software programming. Multiplier is often used in real-time high-speed system application , DSP soft core or hardware implementation of digital signal processing,so it is worthful to know classic high-speed multiplier IP
Date : 2026-01-18 Size : 302kb User : czy
[VHDL-FPGA-Verilog] two_d_dct_serial DL : 1: altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码，语言是：verilog 性能不错，不过资源消耗有点大，可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be used to transform learning polynomial algorithm DCT
Date : 2026-01-18 Size : 24kb User : 猪猪
[VHDL-FPGA-Verilog] verilog SDRAM core DL : 1: 我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
Date : 2026-01-18 Size : 27kb User : 于飞
[VHDL-FPGA-Verilog] Mouse_HLD3 DL : 0: 基于fpga和xinlinx ise的鼠标应用vhdl程序，希望对你有所帮助！-and they simply based on the mouse xinlinx ideally VHDL application procedures, and I hope to help you!
Date : 2026-01-18 Size : 564kb User : 王萌
[VHDL-FPGA-Verilog] VGA显示的FPGA实现方法 DL : 0: VGA显示的FPGA实现方法，包括原理和一个小例子。-the application of VGA display with FPGA,include theory and example
Date : 2026-01-18 Size : 83kb User : 王天权
[VHDL-FPGA-Verilog] PhaseNoise DL : 0: 小数分频技术解决了锁相环频率合成器中的频率分辨率和转换时间的矛盾, 但是却引入了严重的相位噪声, 传统的相位补偿方法由于对Aö D 等数字器件的要求很高并具有滞后性实现难度较大。$2 调制器对噪声具有整形的功能, 因而将多阶的$2 调制器用于小数分频合成器中可以很好地解决他的相位噪声的问题, 大大促进了小数分频技术的发展和应用。文章最后给出了在GHz 量级上实现的这种新型小数分频合成器的应用电路, 并测得良好的相噪性能。-Fractional-N technology to solve the PLL frequency synthesizer in the frequency resolution and conversion time of contradictions, but the introduction of a serious phase noise, the traditional method of phase compensation A? D because of the number of devices, such as demanding and have the lag is more difficult to achieve. $ 2 modulator with noise shaping function, and thus will be more than the $ 2-order modulator for fractional-N synthesizer can be a good solution to his problem of phase noise, contributed significantly to the fractional-N technology development and applications. Finally, the article in the GHz order to achieve this new fractional-N synthesizer of the application circuit, and measured a good phase noise performance.
Date : 2026-01-18 Size : 280kb User : 朱成发
[VHDL-FPGA-Verilog] FPGA-design-and-application DL : 0: 已经正式出版，西安电子科技大学出版社，FPGA设计及应用，作者褚振勇-Has been officially published, Xi' an University of Electronic Science and Technology Publishing House, FPGA design and application, the author Zhezhengyong
Date : 2026-01-18 Size : 36.25mb User : 宋大力
[VHDL-FPGA-Verilog] sopc_uart_rt DL : 0: sopc的一个应用例程：应用uart部件搭建的一个sopc系统，调试成功了。包含所有源代码-An application of routine sopc: Application uart component erected a sopc system, commissioning a success. Contains all the source code
Date : 2026-01-18 Size : 10.14mb User : 王乐
[VHDL-FPGA-Verilog] Realization_of_FPGA_for_LDPC_encoding DL : 0: 低密度奇偶校验码(简称LDPC码)是目前距离香农限最近的一种线性纠错码，它的直接编码运算量较大，通常具有码长的二次方复杂度．为此，利用有效的校验矩阵，来降低编码的复杂度，同时研究利用大规模集成电路实现LDPC码的编码．在ISE 8．2软件平台上采用基于FPGA的Verilog HDL语言实现了有效的编码过程，为LDPC码的硬件实现和实际应用提供了依据-Abstract：Low．density parity·check code(LDPC code)is a kind of linear eror·correcting code nearest to Shannon Limit．For LDPC cod e，the computational overhead for direct encoding operations is large，as the complexity of encod ing is the square of the length of codeword．Hence，this paper reduces the complexity of coding by using effective parity—check matrix，and realizes the encoding device for LDPC code by use of large·scale integrated circuits．The effective encoding process based on FPGA with Verilog HDL language is implemented on ISE 8．2 software platform ，providing a feasible basis for hardware implementation an d practical application of LDPC code．
Date : 2026-01-18 Size : 162kb User : 秦小星
[VHDL-FPGA-Verilog] CRC-Application-Note DL : 0: 赛灵思官方发布的关于CRC（循环冗余校验）的设计指导书，对想利用硬件描述语言编写CRC代码的同志很有帮助-CRC Application Note from Xilinx
Date : 2026-01-18 Size : 77kb User : youungsky
[VHDL-FPGA-Verilog] The-application-of-ADC-and-DAC DL : 0: ADC和DAC设计的应用宝典，对于硬件工程师很有参考价值-The application of ADC and DAC design canon of great reference value for the hardware engineers
Date : 2026-01-18 Size : 1.44mb User : 阿飞
[VHDL-FPGA-Verilog] EDA-and-Technology-Application DL : 1: EDA技术综合应用实例与分析的课堂讲义，ppt格式的，里面有很多例程，例如第14章出租车计费系统，第9章电梯控制器的设计与分析，第12章图像边缘检测器的设计-EDA and Technology Application and analysis of the lecture notes, ppt format, there are many routines, such as Chapter 14, a taxi billing system, Chapter 9, the elevator controller design and analysis, Chapter 12, the image edge detector design, etc.
Date : 2026-01-18 Size : 23.47mb User : 侯娟
[VHDL-FPGA-Verilog] FPGA-design-theory-and-application DL : 0: 现场可编程逻辑门阵列器件 FPGA原理及应用设计，适用于工程技术人员学习以及参考设计-Field programmable gate array device FPGA design theory and application
Date : 2026-01-18 Size : 10.31mb User : jizhendong
[VHDL-FPGA-Verilog] 6_VHDL-application-design DL : 0: VDHL应用实例，包括组合逻辑电路设计，时序逻辑电路设计，存储器设计，状态机设计 -VDHL application design samples, including combined logic design, timing logic design, memory design, and status machine design
Date : 2026-01-18 Size : 301kb User : demo xie
[VHDL-FPGA-Verilog] LVDS-application-Verilog-HDL-code DL : 0: LVDS的应用的Verilog HDL例子程序-LVDS example of the application procedures for the Verilog HDL
Date : 2026-01-18 Size : 412kb User : vico
[VHDL-FPGA-Verilog] application-in-card-and-servo-drive DL : 0: AB相编码器解码接口_PWM输出SOPC方案及其在运动控制卡和伺服驱动器中的应用-AB phase encoder decoder interface _PWM output SOPC program and its application in motion control card and servo drive
Date : 2026-01-18 Size : 369kb User : long
[VHDL-FPGA-Verilog] brstm32mc0910 DL : 0: Three phase brushless motors (either AC induction or permanent magnet synchronous motors) historically owe their great success in adjustable speed application to the advent of frequency converters and sophisticated control techniques. These high-performance drives were mainly used for factory automation and robotics. For the last decade, the significant price decrease of the electronics bill of material allowed them to be used in cost-sensitive markets such as household appliances, air conditioning or personal healthcare equipment. We will discuss here how ARM-based standard devices helped to break the complexity paradigm in a market that was for long dominated by DSPs and FPGAs. STMicroelectronics’ STM32 product family, based on the Cortex-M3 core, will be used as the example.
Date : 2026-01-18 Size : 352kb User : coptaire
[VHDL-FPGA-Verilog] UART-application DL : 0: uart核应用的各种介绍让大家了解到一些基础的知识总结的很全面适合初学者-Uart nuclear application of various introduce let everybody understand to some basic knowledge of very comprehensive summary for beginners
Date : 2026-01-18 Size : 679kb User : yuweiyang
[VHDL-FPGA-Verilog] FPGA-application DL : 0: 28个FPGA应用开发代码实例，可供初学者学习使用-28 FPGA application development code examples
Date : 2026-01-18 Size : 1.76mb User : 铁鹏涛
[VHDL-FPGA-Verilog] FPGA-program-for-sapce-application DL : 0: 航天应用的FPGA程序的典型案例分析，含源代码；特别适合于航天领域的FPGA程序设计员。-typical examples of fpga programs for space application
Date : 2026-01-18 Size : 50.3mb User : huqiong

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