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[VHDL-FPGA-Verilog] svpwm_full_nios DL : 0: 这是我毕业设计做的一个SVPWM同步永磁交流电机的控制系统，里面除了一个SVPWM的驱动算法之外，还有一个步进电机的控制器，以及基于QUARTUS7.2的NIOS II控制核心，通过PC的串口可以控制同步永磁交流电机和步进电机进行精确的定位。该系统较复杂，运用的知识也比较多，在SVPWM算法，PID算法，步进电机控制方面，NIOS II的串口编程等都有值得参考的地方。最好使用QUARTUS7.2编译，目标芯片是选用EP1C6Q240-This is my graduation project SVPWM make a permanent magnet AC synchronous motor control system, which apart from a driver SVPWM algorithm, there is a stepper motor controller, as well as QUARTUS7.2 based on the NIOS II control core, through PC serial port can be controlled permanent magnet AC synchronous motor and stepper motor for accurate positioning. The system is more complicated, the use of more knowledge, in the SVPWM algorithm, PID algorithm, stepper motor control, NIOS II serial programming, such as places are worth considering. QUARTUS7.2 compile the best use of the target chip is optional EP1C6Q240
Date : 2025-12-20 Size : 12.56mb User : 汉武帝
[VHDL-FPGA-Verilog] tec_control_pgfa DL : 0: 使用fpga基于积分分离的pid算法进行温控的程序，经实验证明很稳定-Fpga points based on the use of separate pid process temperature control algorithm, the experiment proved to be stable
Date : 2025-12-20 Size : 3kb User : shengtao
[VHDL-FPGA-Verilog] fuzzy_inanalyser DL : 0: VHDL模糊PID控制控制器模糊化程序。-Fuzzy PID control of VHDL programming fuzzy controller.
Date : 2025-12-20 Size : 1kb User : Huanggeng
[VHDL-FPGA-Verilog] fuzzy_inference DL : 0: VHDL模糊PID控制器模糊推理，推理结果：直接用经验值输出。-Fuzzy PID controller VHDL fuzzy reasoning, reasoning results: the direct use of the experience of the value of output.
Date : 2025-12-20 Size : 2kb User : Huanggeng
[VHDL-FPGA-Verilog] pid_vhdl_code DL : 0: PID controller... ... ... ... ... ... ... ... ..... -PID controller.....................................................
Date : 2025-12-20 Size : 70kb User : kiran
[VHDL-FPGA-Verilog] FPGA-based_PID_controller_for_achieving.ZIP DL : 0: 基于FPGA实现PID控制器的研究介绍了一种基于 FPGA 的用数字电路实现的 PID控制器。把原来用单片机实现的数字 PID 控制算法单独用数字电路来实现，保留单片机对参数整定的灵活性。在设计中研究了 PID 算法的数字电路实现。由于把 PID 控制从单片机中隔离出来，因此可以降低在工控场合强烈的干扰造成单片机程序跑飞对整个系统的影响，提高了控制的可靠性。最后介绍了本设计在逃逸链梯中的应用。-FPGA-based PID controller for achieving
Date : 2025-12-20 Size : 171kb User : JIPU_PHIL
[VHDL-FPGA-Verilog] PIDVHDL DL : 0: 利用vhdl语言实现的pid控制代码，可以应用于需要硬件实现的底层控制中，比如电机控制-Using vhdl language of the pid control code can be applied to the underlying need to control hardware, such as motor control
Date : 2025-12-20 Size : 3kb User : 刘业超
[VHDL-FPGA-Verilog] fpga_pid DL : 1: 基于FPGA的温度模糊自适应PID控制器的设计-FPGA-based PID temperature fuzzy adaptive controller design
Date : 2025-12-20 Size : 160kb User : 吴展理
[VHDL-FPGA-Verilog] 232543 DL : 0: FPGA Implementation of QFT based Controller for a Buck type DC-DC Power Converter and Comparison with Fractional and Integral Order PID Controllers
Date : 2025-12-20 Size : 804kb User : Revathy
[VHDL-FPGA-Verilog] pid_controler_latest.tar DL : 0: PID控制器的verilog实现，做闭环控制器的人可以参考-PID controller verilog implementation of closed-loop controller may make reference to
Date : 2025-12-20 Size : 3kb User : 磊
[VHDL-FPGA-Verilog] PID DL : 0: 用VHDL语言来实现PID算法，文件包含了仿真的所有结果-VHDL language used to implement PID algorithm, the file contains all the simulation results. . .
Date : 2025-12-20 Size : 1.03mb User : 陈小林
[VHDL-FPGA-Verilog] PID_AN DL : 0: fgpa implemented source code for pid controller in vhdl for battery charging application1
Date : 2025-12-20 Size : 103kb User : karthikssn
[VHDL-FPGA-Verilog] PID DL : 0: 流量控制正文 PID算法的自动控制 fpga-Flow control body of the PID algorithm for the automatic control
Date : 2025-12-20 Size : 427kb User : 贺宗攀
[VHDL-FPGA-Verilog] pid DL : 0: 采样量化，实现数字PID功能，并观察了PID实现后的误差。包含测试文件和实验报告-Sample quantization, digital PID function, and after observing the realization of the error of PID. Contains the test documents and test reports
Date : 2025-12-20 Size : 142kb User : danlu
[VHDL-FPGA-Verilog] FPGA-PID- DL : 0: FPGA闭环控制电路积分分离式PID算法子程序算法函数中断函数-Integral closed loop control circuit FPGA PID algorithm separate interrupt function subroutine algorithm function
Date : 2025-12-20 Size : 72kb User : 一
[VHDL-FPGA-Verilog] pid-controller DL : 0: vhdl source code for pid controller on fpga
Date : 2025-12-20 Size : 4kb User : reza
[VHDL-FPGA-Verilog] PID DL : 0: PID控制，采用VHDL代码实现，整个实体模块由三个vhdl文件组成，仅供参考和学习；-PID control, the use of VHDL code, the entire entity vhdl module consists of three files, for reference and learning
Date : 2025-12-20 Size : 3kb User : youlijun
[VHDL-FPGA-Verilog] PID DL : 0: 用Verilog HDL编写的PID程序代码，成功调试，运行良好。-The source code of PID in Verilog HDL.Simulation was successful.
Date : 2025-12-20 Size : 1.18mb User : Alen Fielding
[VHDL-FPGA-Verilog] FPGA-PID DL : 0: 基于FPGA设计的一个PID控制系统，完成对物体检测和运动控制；直流电机和步进电机驱动模块是可选的。(PID control system based on FPGA: Objection detection, movement control, motor driver is optional)
Date : 2025-12-20 Size : 421kb User : 余平
[VHDL-FPGA-Verilog] PID DL : 0: 利用Verilog语言实现PID增量式控制，输出占空比(Using Verilog language to realize PID incremental control and output duty cycle)
Date : 2025-12-20 Size : 1kb User : 人生苦短98

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