Search - stopwatch

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[Embeded-SCM Develop] paobiao DL : 0: 用verilog写的跑表程序--Stopwatch program written by verilog.
Date : 2008-10-13 Size : 951byte User : 李兵
[Embeded-SCM Develop] paobiao DL : 0: 用verilog写的跑表程序--Stopwatch program written by verilog.
Date : 2025-12-13 Size : 1kb User :
[Embeded-SCM Develop] 123 DL : 0: 电子跑表基于DVCC设计的电子跑表,是微机原理课程设计的题目,欢迎大家参考-Electronic stopwatch DVCC-based design of electronic stopwatch, is the principle of curriculum design computer topics are welcome to your reference
Date : 2025-12-13 Size : 2kb User : 谢林林
[Embeded-SCM Develop] counter60 DL : 0: 该实验设计模60计数器，并通过数码管进行显示，最后实现秒表的功能。7段数码管采用共阴极数码管，如图1所示，当某段接有高电平时该段将发光。-The experimental design mode 60 counters, and through digital tube display, and finally achieve the stopwatch function. 7 digital tube using a total digital cathode tubes, as shown in Figure 1, when a certain period of time then there is high that the paragraph would luminescence.
Date : 2025-12-13 Size : 1kb User : 张龙
[Embeded-SCM Develop] miaobiaoLCD DL : 0: 1602LCD液晶显示秒表程序汇编源程序-1602LCD LCD stopwatch program source code compilation
Date : 2025-12-13 Size : 8kb User : 王云
[Embeded-SCM Develop] miaobiao DL : 0: 利用51单片机设计数字钟，具有调时，调分，闹钟，秒表等功能-51 single-chip designs use digital clock with a transfer, the transfer points, alarm clock, stopwatch functions
Date : 2025-12-13 Size : 1kb User : fangka
[Embeded-SCM Develop] 99sClockQQ64134703 DL : 0: QQ64134703毕业设计基于AT89C51，用PROTEUS仿真实现的能计时99S的秒表。 -QQ64134703 graduation design is based on AT89C51, with PROTEUS simulation to realize the 99S of the stopwatch timer.
Date : 2025-12-13 Size : 26kb User : 无名
[Embeded-SCM Develop] 01 DL : 0: 可实现时钟功能,倒计时,秒表,可以修改时间,蜂鸣器报警等-Achievable clock function, countdown, stopwatch, you can modify the time, buzzer alarm, etc.
Date : 2025-12-13 Size : 2kb User : bulaoweng
[Embeded-SCM Develop] LCD1602 DL : 0: LCD1602 显示秒表 LCD1602应用实例-LCD1602 display stopwatch application LCD1602
Date : 2025-12-13 Size : 2.79mb User : yishi
[Embeded-SCM Develop] 51 DL : 0: 这是本人搞的一个课程设计的原程序，是用51单片机做的一个电子跑表。-This is, I engage in a curriculum designed by the original procedure, 51 are used to do a single-chip electronic stopwatch.
Date : 2025-12-13 Size : 8kb User : 张智
[Embeded-SCM Develop] clock DL : 1: 用verilog实现的数字跑表，下载到FPGA开发板上验证通过。下载后从新分配引脚即可用。-Verilog implementation using digital stopwatch, download to FPGA development board to verify the adoption. After the download you can use the new distribution of pins.
Date : 2025-12-13 Size : 481kb User : lizhiqiang
[Embeded-SCM Develop] 1602LCD DL : 0: 1602LCD液晶秒表-1602LCD LCD stopwatch
Date : 2025-12-13 Size : 18kb User : chen
[Embeded-SCM Develop] miaobiao DL : 0: 单片机程序，控制数码管做跑表使用，最小计时单位0.01秒。-Single-chip process control using a digital stopwatch cylinder, the smallest unit of time 0.01 seconds.
Date : 2025-12-13 Size : 1kb User : zhoushiru
[Embeded-SCM Develop] 9.9miaopaobiao DL : 0: 这是一个跑表，可以实现时钟显示时间和计时功能。-This is a stopwatch, can display time and time clock functions.
Date : 2025-12-13 Size : 14kb User : lishan
[Embeded-SCM Develop] stopwatch DL : 0: eda实现的电子秒表，稳定，精确，适合eda实验参考程序-eda electronic stopwatch to achieve stable, accurate and suitable for experimental reference procedures eda
Date : 2025-12-13 Size : 342kb User : pan
[Embeded-SCM Develop] deCPLDVHDLshijong DL : 0: 基于CPLD的VHDL语言数字钟（含秒表）设计利用一块芯片完成除时钟源、按键、扬声器和显示器（数码管）之外的所有数字电路功能。所有数字逻辑功能都在CPLD器件上用VHDL语言实现。这样设计具有体积小、设计周期短（设计过程中即可实现时序仿真）、调试方便、故障率低、修改升级容易等特点。本设计采用自顶向下、混合输入方式（原理图输入—顶层文件连接和VHDL语言输入—各模块程序设计）实现数字钟的设计、下载和调试。 -CPLD based on the VHDL language digital clock (with stopwatch) design using a chip can be completed in addition to the clock source, buttons, speakers and display (LED) in addition to all functions of digital circuits. All digital logic functions are used in the CPLD device VHDL language. This design has a small and short design cycle (design process to achieve timing simulation), to facilitate debugging, fault rate is low and easy to modify the characteristics of the upgrade. The design uses a top-down, mixed input (input schematic- top-level file access and VHDL language input- the module program design) Design of digital clock, download and debug.
Date : 2025-12-13 Size : 93kb User : wuhuisong
[Embeded-SCM Develop] sec DL : 0: 利用proteus设计的秒表，包括原理图和程序源代码。-Stopwatch using proteus design, including schematics and source code.
Date : 2025-12-13 Size : 48kb User : fjb
[Embeded-SCM Develop] Lab6-stopWatch DL : 0: AVR32 development Environment. This source file creates stop watch that is used in evk1100 development board.
Date : 2025-12-13 Size : 3.43mb User : raghad
[Embeded-SCM Develop] Stopwatch DL : 0: 秒表：包含启动（外部中断）,停止、复位按键（查询），定时一秒（定时器中断）。复位：时间复位并停止 -Stopwatch： Contains the start (external interrupt), stop, reset button (query), one second timer (timer interrupt). Reset: time reset and stop
Date : 2025-12-13 Size : 96kb User : lois
[Embeded-SCM Develop] Stopwatch&Timer DL : 0: 嵌入式开发，处理器接口模块功能综合应用，秒表与计时器设计(Integrated application of embedded processor interface module;Stopwatch and timer design)
Date : 2025-12-13 Size : 115kb User : 弥米

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