Filename
Size
Date
prop\bnk_ctrl.v
 10881 
 2011-03-18
prop\clk_counter.v
 8964 
 2011-03-23
prop\comm_fsm.v
 18113 
 2011-03-24
prop\ctrl_fifo.v
 2310 
 2011-03-11
prop\DDR3_SIMULfast read.do
 1351 
 2011-03-24
prop\DDR3_SIMULread.do
 793 
 2011-03-24
prop\DDR3_SIMULwrite.do
 788 
 2011-03-23
prop\DDR3_WAVE.do
 18560 
 2011-06-16
prop\DDR_sdram_top.v
 13654 
 2011-03-23
prop\fifo.v
 2410 
 2011-03-11
prop\ini_fsm.v
 8683 
 2011-03-15
prop\path_ctrl.v
 2566 
 2011-03-17
prop\rd_reg.v
 407 
 2011-03-23
prop\refresh_counter.v
 2030 
 2011-03-19
prop\tb_ddr.v
 3903 
 2016-08-30
prop\tb_ddr.v.bak
 3904 
 2016-08-30
prop\wr_fsm.v
 2211 
 2011-01-16
ext128\bnk_ctrl.v
 10881 
 2011-03-18
ext128\clk_counter.v
 8964 
 2011-03-23
ext128\comm_fsm.v
 18113 
 2011-03-24
ext128\ctrl_fifo.v
 2310 
 2011-03-11
ext128\DDR3_SIMULfast read.do
 1351 
 2011-03-24
ext128\DDR3_SIMULread.do
 793 
 2011-03-24
ext128\DDR3_SIMULwrite.do
 788 
 2011-03-23
ext128\DDR3_WAVE.do
 18560 
 2011-06-16
ext128\DDR_sdram_top.v
 13654 
 2011-03-23
ext128\DDR_sdram_top128.v
 4618 
 2018-02-28
ext128\fifo.v
 2410 
 2011-03-11
ext128\ini_fsm.v
 8683 
 2011-03-15
ext128\path_ctrl.v
 2566 
 2011-03-17
ext128\rd_reg.v
 407 
 2011-03-23
ext128\refresh_counter.v
 2030 
 2011-03-19
ext128\tb_ddr.v
 4275 
 2018-02-28
ext128\tb_ddr.v.bak
 3904 
 2016-08-30
ext128\wr_fsm.v
 2211 
 2011-01-16
prop
 0 
 2018-02-27
ext128
 0 
 2018-02-28