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Title: PipelineCPU Download
 Description: this file contains 3 packs,which is developed in Xilinx ISE contain the basic functions of a typical CPU 5 stages:IF,ID,EX,MEM,WB for education only
 Downloaders recently: [More information of uploader D.FRANCIS]
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File list (Check if you may need any files): 
FilenameSizeDate
PipelineCPU\ISE\coregen.cgp 241  2018-01-06

PipelineCPU\ISE\DataRAM.asy 510  2017-12-29

PipelineCPU\ISE\DataRAM.ngc 10049  2017-12-29

PipelineCPU\ISE\DataRAM.sym 835  2017-12-29

PipelineCPU\ISE\DataRAM.v 4024  2017-12-29

PipelineCPU\ISE\DataRAM.veo 3037  2017-12-29

PipelineCPU\ISE\DataRAM.vhd 4541  2017-12-29

PipelineCPU\ISE\DataRAM.vho 3499  2017-12-29

PipelineCPU\ISE\DataRAM.xco 1780  2017-12-29

PipelineCPU\ISE\DataRAM_flist.txt 177  2017-12-29

PipelineCPU\ISE\DataRAM_readme.txt 1674  2017-12-29

PipelineCPU\ISE\DataRAM_xmdf.tcl 3000  2017-12-29

PipelineCPU\ISE\MipsPipelineCPU.ise 272150  2017-12-29

PipelineCPU\ISE\MipsPipelineCPU.ise_ISE_Backup 272150  2017-12-29

PipelineCPU\ISE\MipsPipelineCPU.restore 51332  2017-12-29

PipelineCPU\ISE\MipsPipelineCPU_summary.html 2319  2017-12-29

PipelineCPU\ISE\templates\coregen.xml 1472  2017-12-29

PipelineCPU\SIM\ALU\ALU.cr.mti 1941  2017-12-29

PipelineCPU\SIM\ALU\ALU.mpf 81807  2017-12-29

PipelineCPU\SIM\ALU\ALU_tb.v 1917  2017-10-27

PipelineCPU\SIM\ALU\vsim.wlf 73728  2017-12-29

PipelineCPU\SIM\ALU\work\@a@l@u\_primary.dat 2195  2017-12-29

PipelineCPU\SIM\ALU\work\@a@l@u\_primary.dbs 1924  2017-12-29

PipelineCPU\SIM\ALU\work\@a@l@u\_primary.vhd 3471  2017-12-29

PipelineCPU\SIM\ALU\work\@a@l@u_tb_v\_primary.dat 1767  2017-12-29

PipelineCPU\SIM\ALU\work\@a@l@u_tb_v\_primary.dbs 1766  2017-12-29

PipelineCPU\SIM\ALU\work\@a@l@u_tb_v\_primary.vhd 76  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopt0xfx9q 1766  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopt1ebg9y 828  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopt2z6395 1113  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopt4yd6ia 571  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopt5f9shh 20832  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopt7egwtn 12016  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopt8zbftx 498  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptayii33 508  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptbfe53a 2417  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptdem8cf 1212  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptezgvbn 354  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptgyqykv 332  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopthc3fys 3472  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopthfjhk2 884  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptixy1y0 1700  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptjetkx7 277  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptkw5576 420  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptkzm7xe 1366  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptmd1r6d 159  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptnywa6k 7520  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptqc8vfi 714  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptqfrx5v 1748  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptrx3efs 17808  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptsez0f0 461  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopttbhvbn 1296  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopttwahry 23024  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptvd64r5 501  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptvsjhk2 808  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptw7n7xe 43760  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptwy1qqc 512  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptxcd71b 76  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptxfx9qj 1767  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptxmrx5v 3471  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\vopty3vje7 1924  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptyx8t0i 1816  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptze4d0s 328  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\voptzhx9qj 2195  2017-12-29

PipelineCPU\SIM\ALU\work\@_opt\_deps 6029  2017-12-29

PipelineCPU\SIM\ALU\work\adder_32bits\_primary.dat 1748  2017-12-29

PipelineCPU\SIM\ALU\work\adder_32bits\_primary.dbs 1816  2017-12-29

PipelineCPU\SIM\ALU\work\adder_32bits\_primary.vhd 501  2017-12-29

PipelineCPU\SIM\ALU\work\adder_4bits\_primary.dat 1366  2017-12-29

PipelineCPU\SIM\ALU\work\adder_4bits\_primary.dbs 2417  2017-12-29

PipelineCPU\SIM\ALU\work\adder_4bits\_primary.vhd 498  2017-12-29

PipelineCPU\SIM\ALU\work\adder_high_4bits\_primary.dat 884  2017-12-29

PipelineCPU\SIM\ALU\work\adder_high_4bits\_primary.dbs 1212  2017-12-29

PipelineCPU\SIM\ALU\work\adder_high_4bits\_primary.vhd 508  2017-12-29

PipelineCPU\SIM\ALU\work\mux_2to1_4bits\_primary.dat 354  2017-12-29

PipelineCPU\SIM\ALU\work\mux_2to1_4bits\_primary.dbs 512  2017-12-29

PipelineCPU\SIM\ALU\work\mux_2to1_4bits\_primary.vhd 461  2017-12-29

PipelineCPU\SIM\ALU\work\_info 3472  2017-12-29

PipelineCPU\SIM\ALU\work\_temp\vlog29qb6h 1735  2017-12-29

PipelineCPU\SIM\ALU\work\_temp\vlog6kc5g6 1736  2017-12-29

PipelineCPU\SIM\ALU\work\_temp\vlog7kt6h2 1701  2017-12-29

PipelineCPU\SIM\ALU\work\_vmake 26  2017-12-29

PipelineCPU\SIM\Decode\Decode.cr.mti 639  2017-12-29

PipelineCPU\SIM\Decode\Decode.mpf 79327  2017-12-29

PipelineCPU\SIM\Decode\Decode_tb.v 1847  2017-10-27

PipelineCPU\SIM\Decode\transcript 49  2018-01-06

PipelineCPU\SIM\Decode\vsim.wlf 73728  2017-12-29

PipelineCPU\SIM\Decode\work\@decode\_primary.dat 5415  2017-12-29

PipelineCPU\SIM\Decode\work\@decode\_primary.dbs 10173  2017-12-29

PipelineCPU\SIM\Decode\work\@decode\_primary.vhd 9369  2017-12-29

PipelineCPU\SIM\Decode\work\@decode_tb_v\_primary.dat 1078  2017-12-29

PipelineCPU\SIM\Decode\work\@decode_tb_v\_primary.dbs 1143  2017-12-29

PipelineCPU\SIM\Decode\work\@decode_tb_v\_primary.vhd 82  2017-12-29

PipelineCPU\SIM\Decode\work\@_opt\vopt2qrrgj 2752  2017-12-29

PipelineCPU\SIM\Decode\work\@_opt\vopt7jkk80 3906  2017-12-29

PipelineCPU\SIM\Decode\work\@_opt\voptcfgg0d 119200  2017-12-29

PipelineCPU\SIM\Decode\work\@_opt\vopthbccrs 9369  2017-12-29

PipelineCPU\SIM\Decode\work\@_opt\voptjskm9t 1473  2017-12-29

PipelineCPU\SIM\Decode\work\@_opt\voptkqgh17 484  2017-12-29

PipelineCPU\SIM\Decode\work\@_opt\voptmmcdsj 387  2017-12-29

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