- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 12kb
- Update:
- 2018-01-08
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- 0 Times
- Uploaded by:
- 王智勇
Description: sdram verilog. SDRAM using interface simulation, Altera company IP use method
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File list (Check if you may need any files):
| Filename | Size | Date |
|---|
| readme.txt | 3115 | 2016-05-13
|
| sdr_module.v | 3107 | 2016-05-13
|
| sdr_parameters.vh | 15797 | 2016-05-13
|
| sdr.v | 47228 | 2016-05-13
|
| test.v | 11884 | 2016-05-13 |
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