- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 62kb
- Update:
- 2017-08-10
- Downloads:
- 0 Times
- Uploaded by:
- 湖
Description: Arbitrary integer frequency divider, output square wave adjustable duty cycle (has been simulated under board verification), the first factor for the frequency division coefficient, the second for the high level, the proportion of the whole square wave
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File list (Check if you may need any files):
fenpin51\db\fenpin51.db_info
fenpin51\db\fenpin51.eco.cdb
fenpin51\db\fenpin51.sim.cvwf
fenpin51\db\fenpin51.sld_design_entry.sci
fenpin51\db\prev_cmp_fenpin51.asm.qmsg
fenpin51\db\prev_cmp_fenpin51.fit.qmsg
fenpin51\db\prev_cmp_fenpin51.map.qmsg
fenpin51\db\prev_cmp_fenpin51.qmsg
fenpin51\db\prev_cmp_fenpin51.sim.qmsg
fenpin51\db\prev_cmp_fenpin51.sta.qmsg
fenpin51\db\wed.wsf
fenpin51\fenpin51.asm.rpt
fenpin51\fenpin51.done
fenpin51\fenpin51.fit.rpt
fenpin51\fenpin51.fit.smsg
fenpin51\fenpin51.fit.summary
fenpin51\fenpin51.flow.rpt
fenpin51\fenpin51.map.rpt
fenpin51\fenpin51.map.summary
fenpin51\fenpin51.pin
fenpin51\fenpin51.pof
fenpin51\fenpin51.qpf
fenpin51\fenpin51.qsf
fenpin51\fenpin51.qws
fenpin51\fenpin51.sim.rpt
fenpin51\fenpin51.sof
fenpin51\fenpin51.sta.rpt
fenpin51\fenpin51.sta.summary
fenpin51\fenpin51.vhd
fenpin51\fenpin51.vhd.bak
fenpin51\fenpin51.vwf
fenpin51\fenpin51_assignment_defaults.qdf
fenpin51\incremental_db\README
fenpin51\incremental_db\compiled_partitions
fenpin51\db
fenpin51\incremental_db
fenpin51
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