- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 11kb
- Update:
- 2017-07-07
- Downloads:
- 0 Times
- Uploaded by:
- 小米
Description: All digital phase-locked loop Verilog source code, including phase discriminator, K variable touch reversible counter, add and subtract pulse and N frequency divider. Have been implemented by simulation.
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verilog-PLL.docx
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