VHDL Code and TestBench Code\array_detect_en_tb.vhd
............................\clock_div_en_tb.vhd
............................\shift_reg_en_tb.vhd
............................\VHDL_Exp_1.vhd
............................\VHDL_Exp_2.vhd
............................\VHDL_Exp_3.vhd
VHDL Code and TestBench Code
Exp3.JPG
Exp1.JPG
Exp2.JPG