DDR3_128M16bit_2Port64bit
.........................\chipscope
.........................\.........\DDR_calibration.cdc
.........................\.........\DDR_chipscope.cdc
.........................\Ipcore
.........................\......\DDR3_MCB_mdl
.........................\......\............\coregen.cgp
.........................\......\............\coregen.log
.........................\......\............\create_DDR3_MCB_mdl.tcl
.........................\......\............\DDR3_MCB_mdl
.........................\......\............\DDR3_MCB_mdl.gise
.........................\......\............\DDR3_MCB_mdl.ncf
.........................\......\............\DDR3_MCB_mdl.veo
.........................\......\............\DDR3_MCB_mdl.xco
.........................\......\............\DDR3_MCB_mdl.xise
.........................\......\............\............\docs
.........................\......\............\............\....\ug388.pdf
.........................\......\............\............\....\ug416.pdf
.........................\......\............\............\example_design
.........................\......\............\............\..............\datasheet.txt
.........................\......\............\............\..............\log.txt
.........................\......\............\............\..............\mig.prj
.........................\......\............\............\..............\par
.........................\......\............\............\..............\...\create_ise.bat
.........................\......\............\............\..............\...\example_top.ucf
.........................\......\............\............\..............\...\icon_coregen.xco
.........................\......\............\............\..............\...\ila_coregen.xco
.........................\......\............\............\..............\...\ise_flow.bat
.........................\......\............\............\..............\...\ise_run.txt
.........................\......\............\............\..............\...\makeproj.bat
.........................\......\............\............\..............\...\mem_interface_top.ut
.........................\......\............\............\..............\...\readme.txt
.........................\......\............\............\..............\...\rem_files.bat
.........................\......\............\............\..............\...\set_ise_prop.tcl
.........................\......\............\............\..............\...\vio_coregen.xco
.........................\......\............\............\..............\rtl
.........................\......\............\............\..............\...\example_top.v
.........................\......\............\............\..............\...\infrastructure.v
.........................\......\............\............\..............\...\mcb_controller
.........................\......\............\............\..............\...\..............\iodrp_controller.v
.........................\......\............\............\..............\...\..............\iodrp_mcb_controller.v
.........................\......\............\............\..............\...\..............\mcb_raw_wrapper.v
.........................\......\............\............\..............\...\..............\mcb_soft_calibration.v
.........................\......\............\............\..............\...\..............\mcb_soft_calibration_top.v
.........................\......\............\............\..............\...\..............\mcb_ui_top.v
.........................\......\............\............\..............\...\memc_tb_top.v
.........................\......\............\............\..............\...\memc_wrapper.v
.........................\......\............\............\..............\...\traffic_gen
.........................\......\............\............\..............\...\...........\afifo.v
.........................\......\............\............\..............\...\...........\cmd_gen.v
.........................\......\.