Description: The Verilog
¤
Hardware Description Language (HDL) is defined in this standard. Verilog
HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because
it is both machine readable and human readable, it supports the development, verification,
synthesis, and testing of hardware designs the communication of hardware design data and the
maintenance, modification, and procurement of hardware. The primary audiences for this standard
are the implementors of tools supporting the language and advanced users of the language.
Keywords:
computer, computer languages, digital systems, electronic systems, hardware, hardware
description languages, hardware design, HDL, PLI, programming language interface, Verilog
HDL, Verilog PLI, Verilog
¤
To Search:
File list (Check if you may need any files):
verilog-ieee.pdf
Download