Description: The design is an FPGA-based tail-biting convolutional code encoder design requires the use verilog language encoder module, through compilation and synthesis, and by contrast matlab and modelsim simulation results validate the design.
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2111303098-XXX.doc
conv_enc\conv.asm.rpt
........\conv.done
........\conv.eda.rpt
........\conv.fit.rpt
........\conv.fit.smsg
........\conv.fit.summary
........\conv.flow.rpt
........\conv.map.rpt
........\conv.map.smsg
........\conv.map.summary
........\conv.pin
........\conv.pof
........\conv.qpf
........\conv.qsf
........\conv.qws
........\conv.sof
........\conv.tan.rpt
........\conv.tan.summary
........\conv_nativelink_simulation.rpt
........\conv_top.v
........\conv_top.v.bak
........\conv_top_tb.v
........\conv_top_tb.v.bak
........\db\alt_u_div_s0f.tdf
........\..\conv.ae.hdb
........\..\conv.asm.qmsg
........\..\conv.asm.rdb
........\..\conv.asm_labs.ddb
........\..\conv.cbx.xml
........\..\conv.cmp.bpm
........\..\conv.cmp.cdb
........\..\conv.cmp.ecobp
........\..\conv.cmp.hdb
........\..\conv.cmp.kpt
........\..\conv.cmp.logdb
........\..\conv.cmp.rdb
........\..\conv.cmp.tdb
........\..\conv.cmp0.ddb
........\..\conv.cmp_merge.kpt
........\..\conv.db_info
........\..\conv.eco.cdb
........\..\conv.eda.qmsg
........\..\conv.fit.qmsg
........\..\conv.hier_info
........\..\conv.hif
........\..\conv.lpc.html
........\..\conv.lpc.rdb
........\..\conv.lpc.txt
........\..\conv.map.bpm
........\..\conv.map.cdb
........\..\conv.map.ecobp
........\..\conv.map.hdb
........\..\conv.map.kpt
........\..\conv.map.logdb
........\..\conv.map.qmsg
........\..\conv.map_bb.cdb
........\..\conv.map_bb.hdb
........\..\conv.map_bb.logdb
........\..\conv.pre_map.cdb
........\..\conv.pre_map.hdb
........\..\conv.rpp.qmsg
........\..\conv.rtlv.hdb
........\..\conv.rtlv_sg.cdb
........\..\conv.rtlv_sg_swap.cdb
........\..\conv.sgate.rvd
........\..\conv.sgate_sm.rvd
........\..\conv.sgdiff.cdb
........\..\conv.sgdiff.hdb
........\..\conv.sld_design_entry.sci
........\..\conv.sld_design_entry_dsc.sci
........\..\conv.smart_action.txt
........\..\conv.syn_hier_info
........\..\conv.tan.qmsg
........\..\conv.tis_db_list.ddb
........\..\conv.tmw_info
........\..\logic_util_heursitic.dat
........\..\lpm_divide_76m.tdf
........\..\prev_cmp_conv.asm.qmsg
........\..\prev_cmp_conv.eda.qmsg
........\..\prev_cmp_conv.fit.qmsg
........\..\prev_cmp_conv.map.qmsg
........\..\prev_cmp_conv.qmsg
........\..\prev_cmp_conv.tan.qmsg
........\..\sign_div_unsign_ckh.tdf
........\encode.v
........\encode.v.bak
........\incremental_db\compiled_partitions\conv.root_partition.cmp.cdb
........\..............\...................\conv.root_partition.cmp.dfp
........\..............\...................\conv.root_partition.cmp.hdb
........\..............\...................\conv.root_partition.cmp.kpt
........\..............\...................\conv.root_partition.cmp.logdb
........\..............\...................\conv.root_partition.cmp.rcfdb
........\..............\...................\conv.root_partition.cmp.re.rcfdb
........\..............\...................\conv.root_partition.map.cdb
........\..............\...................\conv.root_partition.map.dpi
........\..............\...................\conv.root_partition.map.hdb
........\..............\...................\conv.root_partition.map.kpt
........\..............\README
........\input_ram.v
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