Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Example23 Download
 Description: Design a multi-function digital stopwatch VHDL applet, generate 100Hz clock divider counter
 Downloaders recently: [More information of uploader 卢进]
 To Search:
File list (Check if you may need any files):
 

Example23
.........\db
.........\..\exp23.db_info
.........\..\exp23.eco.cdb
.........\..\exp23.sld_design_entry.sci
.........\..\prev_cmp_exp23.asm.qmsg
.........\..\prev_cmp_exp23.eda.qmsg
.........\..\prev_cmp_exp23.fit.qmsg
.........\..\prev_cmp_exp23.map.qmsg
.........\..\prev_cmp_exp23.qmsg
.........\..\prev_cmp_exp23.sta.qmsg
.........\exp23.asm.rpt
.........\exp23.done
.........\exp23.eda.rpt
.........\exp23.fit.rpt
.........\exp23.fit.smsg
.........\exp23.fit.summary
.........\exp23.flow.rpt
.........\exp23.map.rpt
.........\exp23.map.summary
.........\exp23.pin
.........\exp23.qpf
.........\exp23.qsf
.........\exp23.qws
.........\exp23.sof
.........\exp23.sta.rpt
.........\exp23.sta.summary
.........\exp23.vhd
.........\incremental_db
.........\..............\README
.........\..............\compiled_partitions
.........\..............\...................\exp23.root_partition.cmp.atm
.........\..............\...................\exp23.root_partition.cmp.dfp
.........\..............\...................\exp23.root_partition.cmp.hdbx
.........\..............\...................\exp23.root_partition.cmp.kpt
.........\..............\...................\exp23.root_partition.cmp.logdb
.........\..............\...................\exp23.root_partition.cmp.rcf
.........\..............\...................\exp23.root_partition.map.atm
.........\..............\...................\exp23.root_partition.map.dpi
.........\..............\...................\exp23.root_partition.map.hdbx
.........\..............\...................\exp23.root_partition.map.kpt
.........\simulation
.........\..........\modelsim
.........\..........\........\exp23.sft
.........\..........\........\exp23.vho
.........\..........\........\exp23_8_1200mv_0c_vhd_slow.sdo
.........\..........\........\exp23_8_1200mv_85c_vhd_slow.sdo
.........\..........\........\exp23_min_1200mv_0c_vhd_fast.sdo
.........\..........\........\exp23_modelsim.xrf
.........\..........\........\exp23_vhd.sdo
.........\timing
.........\......\primetime
.........\......\.........\exp23.collections.sdc
.........\......\.........\exp23.constraints.sdc
.........\......\.........\exp23.pt.tcl
.........\......\.........\exp23.vo
.........\......\.........\exp23_8_1200mv_0c_v_slow.sdo
.........\......\.........\exp23_8_1200mv_85c_v_slow.sdo
.........\......\.........\exp23_min_1200mv_0c_v_fast.sdo
.........\......\.........\exp23_v.sdo
    

CodeBus www.codebus.net