- Category:
- VHDL-FPGA-Verilog
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-
- File Size:
- 2kb
- Update:
- 2012-11-26
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- Uploaded by:
- 宋臣
Description: the LFSR is coded in VHDL, using a structural description, which is instantiated as a
separate component in the top-level design. Then we can get a random number by a pseudorandom number generator based on a linear feedback
shift register (LFSR)
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Rand_Gen.vhd
tb.vhd
dff.vhd
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