Description:
IMPORTANT NOTE: This design uses the I2C SCL signal as a clock. This requires that the SCL signal
have clean, fast edges on both the rising and falling edges of this signal. Slow rise and fall times
on this signal can show noise effects which can cause improper clocking of registers within the
CoolRunner CPLD. If the loading of the SCL signal in the system is such that the rise and fall
times are slow (>20nS), external buffers such as Schmitt Triggers will be required to interface to
the CPLD.
To Search:
File list (Check if you may need any files):
I2C_vhdl\i2c.cxt
........\i2c.jed
........\i2c.npl
........\i2c.rpt
........\i2c.vhd
........\i2c_control.vhd
........\i2c_timesim.vhd
........\micro_master_tb.vhd
........\micro_slave_tb.vhd
........\micro_tb.vhd
........\micro_test.do
........\micro_test.vhd
........\micro_test_post.do
........\micro_test_post.vhd
........\pullup.vhd
........\readme.txt
........\shift.vhd
........\uc_interface.vhd
........\upcnt4.vhd
........\upcnt4_tb.vhd
........\upcnt4_tb_post.vhd
........\wave.do
........\wave_post.do
........\work
........\....\i2c
........\....\...\behave.dat
........\....\...\behave.psm
........\....\...\structure.dat
........\....\...\structure.psm
........\....\...\_primary.dat
........\....\i2c_control
........\....\...........\behave.dat
........\....\...........\behave.psm
........\....\...........\_primary.dat
........\....\micro_master_tb
........\....\...............\rtl.dat
........\....\...............\rtl.psm
........\....\...............\_primary.dat
........\....\micro_slave_tb
........\....\..............\rtl.dat
........\....\..............\rtl.psm
........\....\..............\_primary.dat
........\....\micro_tb
........\....\........\rtl.dat
........\....\........\rtl.psm
........\....\........\_primary.dat
........\....\micro_test
........\....\..........\archmicro_test.dat
........\....\..........\archmicro_test.psm
........\....\..........\_primary.dat
........\....\micro_test_post
........\....\...............\archmicro_test_post.dat
........\....\...............\archmicro_test_post.psm
........\....\...............\_primary.dat
........\....\pullup
........\....\......\archpullup.dat
........\....\......\archpullup.psm
........\....\......\_primary.dat
........\....\roc
........\....\...\roc_v.dat
........\....\...\roc_v.psm
........\....\...\_primary.dat
........\....\shift8
........\....\......\definition.dat
........\....\......\definition.psm
........\....\......\_primary.dat
........\....\uc_interface
........\....\............\behaviour.dat
........\....\............\behaviour.psm
........\....\............\_primary.dat
........\....\upcnt4
........\....\......\definition.dat
........\....\......\definition.psm
........\....\......\_primary.dat
........\....\_info
I2C_vhdl
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