实验5 IIC实验\verilog HDL设计的IIC程序\I2C_v\at24c08.pdf
.............\........................\.....\db\cntr_p7j.tdf
.............\........................\.....\..\I2C_FPGA.asm.qmsg
.............\........................\.....\..\I2C_FPGA.asm_labs.ddb
.............\........................\.....\..\I2C_FPGA.cbx.xml
.............\........................\.....\..\I2C_FPGA.cmp.cdb
.............\........................\.....\..\I2C_FPGA.cmp.hdb
.............\........................\.....\..\I2C_FPGA.cmp.logdb
.............\........................\.....\..\I2C_FPGA.cmp.rdb
.............\........................\.....\..\I2C_FPGA.cmp.tdb
.............\........................\.....\..\I2C_FPGA.cmp0.ddb
.............\........................\.....\..\I2C_FPGA.cmp2.ddb
.............\........................\.....\..\I2C_FPGA.dbp
.............\........................\.....\..\I2C_FPGA.db_info
.............\........................\.....\..\I2C_FPGA.eco.cdb
.............\........................\.....\..\I2C_FPGA.fit.qmsg
.............\........................\.....\..\I2C_FPGA.hier_info
.............\........................\.....\..\I2C_FPGA.hif
.............\........................\.....\..\I2C_FPGA.map.cdb
.............\........................\.....\..\I2C_FPGA.map.hdb
.............\........................\.....\..\I2C_FPGA.map.logdb
.............\........................\.....\..\I2C_FPGA.map.qmsg
.............\........................\.....\..\I2C_FPGA.pre_map.cdb
.............\........................\.....\..\I2C_FPGA.pre_map.hdb
.............\........................\.....\..\I2C_FPGA.psp
.............\........................\.....\..\I2C_FPGA.pss
.............\........................\.....\..\I2C_FPGA.rtlv.hdb
.............\........................\.....\..\I2C_FPGA.rtlv_sg.cdb
.............\........................\.....\..\I2C_FPGA.rtlv_sg_swap.cdb
.............\........................\.....\..\I2C_FPGA.sgdiff.cdb
.............\........................\.....\..\I2C_FPGA.sgdiff.hdb
.............\........................\.....\..\I2C_FPGA.signalprobe.cdb
.............\........................\.....\..\I2C_FPGA.sld_design_entry.sci
.............\........................\.....\..\I2C_FPGA.sld_design_entry_dsc.sci
.............\........................\.....\..\I2C_FPGA.smp_dump.txt
.............\........................\.....\..\I2C_FPGA.syn_hier_info
.............\........................\.....\..\I2C_FPGA.tan.qmsg
.............\........................\.....\..\I2C_FPGA.tis_db_list.ddb
.............\........................\.....\..\prev_cmp_I2C_FPGA.asm.qmsg
.............\........................\.....\..\prev_cmp_I2C_FPGA.fit.qmsg
.............\........................\.....\..\prev_cmp_I2C_FPGA.map.qmsg
.............\........................\.....\..\prev_cmp_I2C_FPGA.tan.qmsg
.............\........................\.....\delay_reset_block.bdf
.............\........................\.....\delay_reset_block.bsf
.............\........................\.....\i2c.bsf
.............\........................\.....\i2c.v
.............\........................\.....\i2c.v.bak
.............\........................\.....\I2C_AV_Config.bsf
.............\........................\.....\I2C_AV_Config.v
.............\........................\.....\I2C_Controller.bsf
.............\........................\.....\I2C_Controller.v
.............\........................\.....\I2C_FPGA.asm.rpt
.............\........................\.....\I2C_FPGA.bdf
.............\........................\.....\I2C_FPGA.cdf
.............\........................\.....\I2C_FPGA.done
.............\........................\.....\I2C_FPGA.dpf
.............\........................\.....\I2C_FPGA.fit.eqn
.............\........................\.....\I2C_FPGA.fit.rpt
.............\........................\.....\I2C_FPGA.fit.smsg
.............\........................\.....\I2C_FPGA.fit.summary
.............\........................\.....\I2C_FPGA.flow.rpt
.............\........................\.....\I2C_FPGA.map.eqn
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