Description: Arbitrary integer divider, by changing the parameters, you can set the desired crossover frequency and duty cycle
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File list (Check if you may need any files):
clk_div\clk_div.cr.mti
.......\clk_div.mpf
.......\clk_div.v
.......\clk_div_tb.v
.......\clk_div_tb.v.bak
.......\vsim.wlf
.......\work\clk_div\verilog.asm
.......\....\.......\_primary.dat
.......\....\.......\_primary.vhd
.......\....\......._tb\verilog.asm
.......\....\..........\_primary.dat
.......\....\..........\_primary.vhd
.......\....\_info
.......\....\clk_div
.......\....\clk_div_tb
.......\work
clk_div
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