Description: In the ISE environment, use verilog language DDS (direct digital frequency synthesizer (Direct Digital Synthesizer) in abbreviation) of the function
To Search:
File list (Check if you may need any files):
DDS\DDS\adder.cmd_log
...\...\adder.lso
...\...\adder.ngc
...\...\adder.ngr
...\...\adder.prj
...\...\adder.stx
...\...\adder.syr
...\...\adder.v
...\...\adder.xst
...\...\adder_vhdl.prj
...\...\cnt10.v
...\...\DDS.cmd_log
...\...\DDS.ise
...\...\DDS.ise_ISE_Backup
...\...\DDS.lso
...\...\DDS.ngc
...\...\DDS.ngr
...\...\DDS.prj
...\...\DDS.stx
...\...\DDS.syr
...\...\DDS.v
...\...\DDS.vhd
...\...\DDS.xst
...\...\DDS_summary.html
...\...\DDS_TEST.v
...\...\DDS_TEST_v_beh.prj
...\...\DDS_TEST_v_isim_beh.exe
...\...\DDS_TEST_v_stx.prj
...\...\DDS_vhdl.prj
...\...\fulladder.v
...\...\f_adder.v
...\...\isim\temp\hdllib.ref
...\...\....\....\hdpdeps.ref
...\...\....\....\vlg15\f__adder.bin
...\...\....\....\...2D\glbl.bin
...\...\....\....\.....\r__sydff.bin
...\...\....\....\...33\fulladder.bin
...\...\....\....\...4B\_d_d_s.bin
...\...\....\....\...62\cnt10.bin
...\...\....\....\....B\_d_d_s___t_e_s_t__v.bin
...\...\....\work\cnt10\cnt10.h
...\...\....\....\.....\mingw\cnt10.obj
...\...\....\....\fulladder\fulladder.h
...\...\....\....\.........\mingw\fulladder.obj
...\...\....\....\.__adder\f__adder.h
...\...\....\....\........\mingw\f__adder.obj
...\...\....\....\glbl\glbl.h
...\...\....\....\....\mingw\glbl.obj
...\...\....\....\hdllib.ref
...\...\....\....\hdpdeps.ref
...\...\....\....\r__sydff\mingw\r__sydff.obj
...\...\....\....\........\r__sydff.h
...\...\....\....\vlg15\f__adder.bin
...\...\....\....\...2D\glbl.bin
...\...\....\....\.....\r__sydff.bin
...\...\....\....\...33\fulladder.bin
...\...\....\....\...4B\_d_d_s.bin
...\...\....\....\...62\cnt10.bin
...\...\....\....\....B\_d_d_s___t_e_s_t__v.bin
...\...\....\....\_d_d_s\mingw\_d_d_s.obj
...\...\....\....\......\_d_d_s.h
...\...\....\....\......___t_e_s_t__v\mingw\_d_d_s___t_e_s_t__v.obj
...\...\....\....\...................\xsim_d_d_s___t_e_s_t__v.cpp
...\...\....\....\...................\_d_d_s___t_e_s_t__v.h
...\...\isim.cmd
...\...\isim.hdlsourcefiles
...\...\isim.log
...\...\.....tmp_save\_1
...\...\isimwavedata.xwv
...\...\r_sydff.v
...\...\xilinxsim.ini
...\...\.st\work\hdllib.ref
...\...\...\....\vlg15\f__adder.bin
...\...\...\....\...2D\r__sydff.bin
...\...\...\....\...33\fulladder.bin
...\...\...\....\...4B\_d_d_s.bin
...\...\...\....\...54\adder.bin
...\...\...\....\...62\cnt10.bin
...\...\_xmsgs\fuse.xmsgs
...\...\......\xst.xmsgs
...\...\__ISE_repository_DDS.ise_.lock
...\...\xst\dump.xst\adder.prj\ngx\notopt
...\...\...\........\.........\...\opt
...\...\...\........\DDS.prj\ngx\notopt
...\...\...\........\.......\...\opt
...\...\isim\work\cnt10\mingw
...\...\....\....\fulladder\mingw
...\...\....\....\.__adder\mingw
...\...\....\....\glbl\mingw
...\...\....\....\r__sydff\mingw
...\...\....\....\_d_d_s\mingw
...\...\....\....\......___t_e_s_t__v\mingw
...\...\xst\dump.xst\adder.prj\ngx
...\...\...\........\DDS.prj\ngx
...\...\isim\temp\vlg15
...\...\....\....\vlg2D
...\...\....\....\vlg33
...\...\....\....\vlg4B
...\...\....\....\vlg62
...\...\....\....\vlg6B
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