Description: FSK/PSK signal modulator VHDL program is divided into divider, m sequence generator, transition detection, 2:1 data selector, the sine wave signal generator and DAC (number, mode converter) 6
To Search:
- [Verilog] - FPGA development, Verilog classic Guide,
- [signal] - This example implements a FSK/PSK modula
- [msk] - fsk verilog source code modulation, comm
- [mult] - 32-bit floating point multiplier source
File list (Check if you may need any files):
fpdpsk.vhd
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