Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: 8sc Download
 Description: 8-bit display delay kept the source code, the more perfect interpretation of the latch Art
 Downloaders recently: [More information of uploader 229747611]
 To Search:
File list (Check if you may need any files):
8位锁存显示
...........\D4.asm.rpt
...........\D4.done
...........\D4.fit.rpt
...........\D4.fit.smsg
...........\D4.fit.summary
...........\D4.flow.rpt
...........\D4.map.rpt
...........\D4.map.summary
...........\D4.pin
...........\D4.pof
...........\D4.qpf
...........\D4.qsf
...........\D4.qws
...........\D4.sim.rpt
...........\D4.sof
...........\D4.tan.rpt
...........\D4.tan.summary
...........\D4.vhd
...........\D4.vhd.bak
...........\D4.vwf
...........\RTL电路.png
...........\SMSCXS.asm.rpt
...........\SMSCXS.done
...........\SMSCXS.fit.rpt
...........\SMSCXS.fit.smsg
...........\SMSCXS.fit.summary
...........\SMSCXS.flow.rpt
...........\SMSCXS.map.rpt
...........\SMSCXS.map.summary
...........\SMSCXS.pin
...........\SMSCXS.pof
...........\SMSCXS.qpf
...........\SMSCXS.qsf
...........\SMSCXS.qws
...........\SMSCXS.sim.rpt
...........\SMSCXS.sof
...........\SMSCXS.tan.rpt
...........\SMSCXS.tan.summary
...........\SMSCXS.vhd
...........\SMSCXS.vhd.bak
...........\SMSCXS.vwf
...........\db
...........\..\D4.asm.qmsg
...........\..\D4.cbx.xml
...........\..\D4.cmp.bpm
...........\..\D4.cmp.cdb
...........\..\D4.cmp.ecobp
...........\..\D4.cmp.hdb
...........\..\D4.cmp.logdb
...........\..\D4.cmp.rdb
...........\..\D4.cmp.tdb
...........\..\D4.cmp0.ddb
...........\..\D4.cmp_bb.cdb
...........\..\D4.cmp_bb.hdb
...........\..\D4.cmp_bb.logdb
...........\..\D4.cmp_bb.rcf
...........\..\D4.db_info
...........\..\D4.dbp
...........\..\D4.eco.cdb
...........\..\D4.eds_overflow
...........\..\D4.fit.qmsg
...........\..\D4.hier_info
...........\..\D4.hif
...........\..\D4.map.bpm
...........\..\D4.map.cdb
...........\..\D4.map.ecobp
...........\..\D4.map.hdb
...........\..\D4.map.logdb
...........\..\D4.map.qmsg
...........\..\D4.map_bb.cdb
...........\..\D4.map_bb.hdb
...........\..\D4.map_bb.logdb
...........\..\D4.pre_map.cdb
...........\..\D4.pre_map.hdb
...........\..\D4.psp
...........\..\D4.pss
...........\..\D4.rtlv.hdb
...........\..\D4.rtlv_sg.cdb
...........\..\D4.rtlv_sg_swap.cdb
...........\..\D4.sgdiff.cdb
...........\..\D4.sgdiff.hdb
...........\..\D4.signalprobe.cdb
...........\..\D4.sim.cvwf
...........\..\D4.sim.hdb
...........\..\D4.sim.qmsg
...........\..\D4.sim.rdb
...........\..\D4.sld_design_entry.sci
...........\..\D4.sld_design_entry_dsc.sci
...........\..\D4.syn_hier_info
...........\..\D4.tan.qmsg
...........\..\DFF.db_info
...........\..\DFF.eco.cdb
...........\..\DFF.sld_design_entry.sci
...........\..\SMSCXS.asm.qmsg
...........\..\SMSCXS.cbx.xml
...........\..\SMSCXS.cmp.bpm
...........\..\SMSCXS.cmp.cdb
...........\..\SMSCXS.cmp.ecobp
...........\..\SMSCXS.cmp.hdb
    

CodeBus www.codebus.net