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Title: fifo_syn Download
 Description: This source is used to achieve FIFO read VERILOG, and the board has been verified in experiments using
 Downloaders recently: [More information of uploader zhaoq2007]
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fifo_syn\fifo_syn_flag.v
........\fifo_syn_ram.v
........\fifo_syn_rdaddr_gen.v
........\fifo_syn_top.v
........\fifo_syn_wraddr_gen.v
........\fifo_top_tb.v
........\使用说明请参看右侧注释====〉〉.txt
........\同步FIFO设计.doc
fifo_syn
    

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