Description: IIC VerilogHDL languages to read and write test procedures, the Quartus II 8.1 debugging through the following
- [iic_master] - it is a iic source verilog code with its
- [I2C] - iic Verilog slave
- [I2C_ise9migration] - IIC of the Verilog implementation projec
- [sopcIIC] - This example is based on the IIC bus des
File list (Check if you may need any files):
10、IIC通信实验\verilogiic1121\db\iic_top.asm.qmsg
...............\..............\..\iic_top.asm_labs.ddb
...............\..............\..\iic_top.cbx.xml
...............\..............\..\iic_top.cmp.cdb
...............\..............\..\iic_top.cmp.hdb
...............\..............\..\iic_top.cmp.kpt
...............\..............\..\iic_top.cmp.logdb
...............\..............\..\iic_top.cmp.rdb
...............\..............\..\iic_top.cmp.tdb
...............\..............\..\iic_top.cmp0.ddb
...............\..............\..\iic_top.db_info
...............\..............\..\iic_top.eco.cdb
...............\..............\..\iic_top.fit.qmsg
...............\..............\..\iic_top.hier_info
...............\..............\..\iic_top.hif
...............\..............\..\iic_top.map.cdb
...............\..............\..\iic_top.map.hdb
...............\..............\..\iic_top.map.logdb
...............\..............\..\iic_top.map.qmsg
...............\..............\..\iic_top.pre_map.cdb
...............\..............\..\iic_top.pre_map.hdb
...............\..............\..\iic_top.rtlv.hdb
...............\..............\..\iic_top.rtlv_sg.cdb
...............\..............\..\iic_top.rtlv_sg_swap.cdb
...............\..............\..\iic_top.sgdiff.cdb
...............\..............\..\iic_top.sgdiff.hdb
...............\..............\..\iic_top.sld_design_entry.sci
...............\..............\..\iic_top.sld_design_entry_dsc.sci
...............\..............\..\iic_top.smp_dump.txt
...............\..............\..\iic_top.syn_hier_info
...............\..............\..\iic_top.tan.qmsg
...............\..............\..\iic_top.tis_db_list.ddb
...............\..............\..\iic_top.tmw_info
...............\..............\..\prev_cmp_iic_top.asm.qmsg
...............\..............\..\prev_cmp_iic_top.fit.qmsg
...............\..............\..\prev_cmp_iic_top.map.qmsg
...............\..............\..\prev_cmp_iic_top.tan.qmsg
...............\..............\..\wed.wsf
...............\..............\iic_com.v
...............\..............\iic_top.asm.rpt
...............\..............\iic_top.cdf
...............\..............\iic_top.done
...............\..............\iic_top.dpf
...............\..............\iic_top.fit.rpt
...............\..............\iic_top.fit.smsg
...............\..............\iic_top.fit.summary
...............\..............\iic_top.flow.rpt
...............\..............\iic_top.map.rpt
...............\..............\iic_top.map.summary
...............\..............\iic_top.pin
...............\..............\iic_top.pof
...............\..............\iic_top.qpf
...............\..............\iic_top.qsf
...............\..............\iic_top.qws
...............\..............\iic_top.tan.rpt
...............\..............\iic_top.tan.summary
...............\..............\iic_top.v
...............\..............\iic_top_assignment_defaults.qdf
...............\..............\.ncremental_db\compiled_partitions\iic_top.root_partition.map.kpt
...............\..............\..............\README
...............\..............\led_seg7.v
...............\..............\tb_iic_top.vwf
...............\实验十、IIC读写实验说明.pdf
...............\verilogiic1121\incremental_db\compiled_partitions
...............\..............\db
...............\..............\incremental_db
...............\verilogiic1121
10、IIC通信实验
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