Description: UESTC 2007- Based on CORDIC for digital down conversion circuit ASIC design and implementation, primarily using cordic algorithm to realize the DDC in each module!
- [cordic] - towards sin, cos trigonometry count VHDL
- [AFE8406SystemEvaluationKit] - Digital IF development board schematics,
- [CordicNCO] - Based on the CORDIC algorithm, the digit
- [verilog_FPGA_DDC] - This a verilog HDL used to achieve the r
- [cordic] - cordic language vhdl algorithm cordic th
- [sram_saa1117verilog] - Image acquisition, storage, control veri
- [cordic] - For wireless communication of digital do
- [DDC] - Multi-channel digital down conversion of
- [ddc] - UESTC 2009- Digital IF Research and FPGA
- [ddc] - UESTC 2009- FPGA-based DDC in the spectr
File list (Check if you may need any files):
ddc.pdf
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