- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 218kb
- Update:
- 2012-11-26
- Downloads:
- 0 Times
- Uploaded by:
- 平凡
Description: In the digital system, there are many chips, and different features are used to realize different functions, which generally include CPU,FPGA,AD,DA, memory, ASSP (special standard module), ASIC, etc. The CPU is used for intelligent control, FPGA is used for hardware algorithm processing and multi-device interface, AD is used for module conversion, DA for digital mode conversion, memory store temporary data. Therefore, how FPGA communicates with other chips is an important design content. Data input, data output, two-way communication, instruction delivery, address management, asynchronous communication problems of different clocks, etc. The most basic MEMORY, such as SRAM(128KX8bbit static MEMORY 628128), involves the input, output, two-way communication, and address management issues, which are highly representative. In the synchronous digital system, FIFO, SDRAM, etc. FIFO is easy to use and very useful. In the QUARTUSII software library, there is a variety of FPGA chip MEMORY for use. However, the MEMORY capacity in FPGA is too limited, so external MEMORY is often needed. Therefore, this program lets you learn to control the MEMORY inside and outside of the chip, and lay the foundation for communication with other intelligent devices. -In the digital system, generally there are several chips, the use of different features used to implement different functions, generally includes CPU, FPGA, AD, DA, memory, ASSP (application specific standard module), ASIC and so on. CPU is used for intelligent control, FPGA hardware algorithm processing and multi-device interface, AD to ADC, DA for digital-analog conversion, memory to store temporary data. Therefore, FPGA how to communicate with other chips are important design elements. Data input, data output, two-way communication, instruction delivery, address management, different clock asynchronous communication problems, and so have to deal with. If the most basic MEMORY SRAM (128KX8bbit static memory 628 128) which involved the input, output, bi-directional communication, address management issues, with strong representation. In synchronous digital systems a lot more use FIFO, SDRAM, etc.. One simple and easy to use FIFO, use very broad. In QUARTUSII software library, there ar
File list (Check if you may need any files):
memtest\db\add_sub_3rh.tdf
.......\..\add_sub_4rh.tdf
.......\..\memtest.asm.qmsg
.......\..\memtest.cbx.xml
.......\..\memtest.cmp.cdb
.......\..\memtest.cmp.hdb
.......\..\memtest.cmp.qrpt
.......\..\memtest.cmp.rdb
.......\..\memtest.cmp.tdb
.......\..\memtest.cmp0.ddb
.......\..\memtest.dbp
.......\..\memtest.db_info
.......\..\memtest.eco.cdb
.......\..\memtest.eds_overflow
.......\..\memtest.fit.qmsg
.......\..\memtest.fnsim.cdb
.......\..\memtest.fnsim.hdb
.......\..\memtest.fnsim.qmsg
.......\..\memtest.hier_info
.......\..\memtest.hif
.......\..\memtest.map.cdb
.......\..\memtest.map.hdb
.......\..\memtest.map.qmsg
.......\..\memtest.pre_map.cdb
.......\..\memtest.pre_map.hdb
.......\..\memtest.psp
.......\..\memtest.rtlv.hdb
.......\..\memtest.rtlv_sg.cdb
.......\..\memtest.rtlv_sg_swap.cdb
.......\..\memtest.sgdiff.cdb
.......\..\memtest.sgdiff.hdb
.......\..\memtest.sim.hdb
.......\..\memtest.sim.qmsg
.......\..\memtest.sim.qrpt
.......\..\memtest.sim.rdb
.......\..\memtest.sim.vwf
.......\..\memtest.sld_design_entry.sci
.......\..\memtest.sld_design_entry_dsc.sci
.......\..\memtest.syn_hier_info
.......\..\memtest.tan.qmsg
.......\..\mux_jcc.tdf
.......\memtest.asm.rpt
.......\memtest.done
.......\memtest.fit.eqn
.......\memtest.fit.rpt
.......\memtest.fit.summary
.......\memtest.flow.rpt
.......\memtest.map.eqn
.......\memtest.map.rpt
.......\memtest.map.summary
.......\memtest.pin
.......\memtest.pof
.......\memtest.qpf
.......\memtest.qsf
.......\memtest.qws
.......\memtest.sim.rpt
.......\memtest.sof
.......\memtest.tan.rpt
.......\memtest.tan.summary
.......\memtest.vhd
.......\memtest07022316.vwf
.......\talkback\memtest.asm.talkback.xml
.......\........\memtest.fit.talkback.xml
.......\........\memtest.map.talkback.xml
.......\........\memtest.sim.talkback.xml
.......\........\memtest.tan.talkback.xml
.......\db
.......\talkback
memtest
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