ref-sdr-sdram-verilog SDRAM controller, use the wr - CodeBus

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VHDL-FPGA-Verilog

Title: ref-sdr-sdram-verilog

Category:
VHDL-FPGA-Verilog
Tags:
[PDF]
File Size:
758kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
yangbo_57

Description: SDRAM controller, use the write verilog

Downloaders recently: [More information of uploader yangbo_57]

To Search: SDR SDRAM

[SDRAM] - verilog 128 bit unexpected 4. sdr fpga c
[SDRAM] - failed to translate
[ref-sdr-sdram-verilog] - sdram and verilog implent
[sdr-sdram-(verilog)] - Altera' s SDR SDRAM model, verilog im

File list (Check if you may need any files):

doc
simulation
..........\sdr_sdram_tb.v
source
......\altclklock.v
......\Command.v
......\compile_all.v
......\control_interface.v
......\Params.v
......\PLL1.v
......\sdr_data_path.v
......\sdr_sdram.v
sdr_sdram.pdf
readme_sdr_sdram.txt

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