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Title: speed_measure_on_7_segment Download
 Description: Period method of frequency measuring (change constant to speed measure). DE2 Board Quartus project. Input signal on GPIO, result on 7seg, start/stop with key[0].
 Downloaders recently: [More information of uploader rogalek]
 To Search: DE2 SEG VHDL DE2 GPIO
  • [tut_nios2_introduction] - This tutorial presents an introduction t
  • [TYTU] - The use of Quartus II software, Altera D
  • [fsk] - vhdl language signals fsk modulation and
File list (Check if you may need any files):
speed_measure_on_7_segment\adder10.vhd
..........................\czasolicz.vhd
..........................\db\Schemat_01.cmp.rdb
..........................\..\Schemat_01.db_info
..........................\..\Schemat_01.eco.cdb
..........................\..\Schemat_01.restore.qmsg
..........................\..\Schemat_01.sim.cvwf
..........................\..\Schemat_01.sld_design_entry.sci
..........................\incremental_db\README
..........................\lpm_constant9.bsf
..........................\lpm_constant9.inc
..........................\lpm_constant9.qip
..........................\lpm_constant9.vhd
..........................\lpm_constant9_inst.vhd
..........................\lpm_divide3.bsf
..........................\lpm_divide3.inc
..........................\lpm_divide3.qip
..........................\lpm_divide3.vhd
..........................\lpm_divide3_inst.vhd
..........................\Project_01.qpf
..........................\Project_01.qws
..........................\Project_01.tcl
..........................\Schemat_01.qsf
..........................\Schemat_01.restore.rpt
..........................\Schemat_01_assignment_defaults.qdf
..........................\.ource\bin2dec.vhd
..........................\......\clk_divider.vhd
..........................\......\debounce.vhd
..........................\......\dec_7seg.vhd
..........................\......\HEX2DEC_16_bit.vhd
..........................\......\licz_16bit.vhd
..........................\......\TEST_zaliczanie.bdf
..........................\......\timer.vwf
..........................\incremental_db\compiled_partitions
..........................\db
..........................\incremental_db
..........................\Source
speed_measure_on_7_segment
    

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