PCI的IP coreor1k[1]\pci\bus_commands.v
...................\...\conf_space\conf_space.v
...................\...\..........\CVS\Entries
...................\...\..........\...\Repository
...................\...\..........\...\Root
...................\...\constants.v
...................\...\constants.v.bak
...................\...\CVS\Entries
...................\...\...\Entries.Log
...................\...\...\Repository
...................\...\...\Root
...................\...\Decoder\CVS\Entries
...................\...\.......\...\Repository
...................\...\.......\...\Root
...................\...\.......\decoder.v.TXT
...................\...\.......\defines.v
...................\...\.......\readme.txt
...................\...\.......\tb_decoder.v
...................\...\.......\tb_defines.v
...................\...\delayed_sync\CVS\Entries
...................\...\............\...\Repository
...................\...\............\...\Root
...................\...\............\delayed_sync.v
...................\...\............\READ_ME.txt
...................\...\.ocs\CVS\Entries
...................\...\....\...\Repository
...................\...\....\...\Root
...................\...\....\pci_specification.pdf
...................\...\.river\CVS\Entries
...................\...\......\...\Repository
...................\...\......\...\Root
...................\...\......\README.txt
...................\...\......\sdram_test
...................\...\......\sdram_test.c
...................\...\......\spartan_drv-2.2.o
...................\...\......\spartan_drv-2.4.o
...................\...\......\spartan_drv.c
...................\...\......\spartan_kint.h
...................\...\FIFOs\CVS\Entries
...................\...\.....\...\Repository
...................\...\.....\...\Root
...................\...\.....\dp_async_ram.v
...................\...\.....\dp_sram.v
...................\...\.....\fifo_control.v
...................\...\.....\pciw_pcir_fifos.v
...................\...\.....\pci_tb.v
...................\...\.....\read_me.pdf
...................\...\.....\wbw_wbr_fifos.v
...................\...\.....\wb_tb.v
...................\...\conf_space\CVS
...................\...\Decoder\CVS
...................\...\delayed_sync\CVS
...................\...\.ocs\CVS
...................\...\.river\CVS
...................\...\FIFOs\CVS
...................\...\conf_space
...................\...\CVS
...................\...\Decoder
...................\...\delayed_sync
...................\...\docs
...................\...\driver
...................\...\FIFOs
...................\pci
PCI的IP coreor1k[1]