Description: Introduce a measurement for the satellite attitude CMOS image sensor- STAR250 timing drive signals, and use the Verilog HDL language design-driven sequential circuits. After routing, simulation, testing verified the correctness of the drive signal.
- [sram] - SRAM read and write small programs using
- [1234] - Introduction MT9V011 CMOS digital image
- [FPGAdeguangshanjiancejishu] - This document designed a grating displac
- [imageSample] - This is an image sensor data collection
- [DE1_D5M_LTM] - verilog new code for image sensor ov7660
File list (Check if you may need any files):
基于Verilog HDL的CMOS图像敏感器驱动电路设计\基于Verilog HDL的CMOS图像敏感器驱动电路设计9.doc
基于Verilog HDL的CMOS图像敏感器驱动电路设计
Download