Description: Species with FPGA to achieve high-speed A/D conversion chip control circuit, the system as an example to MAX125 details FIFO memory contains A/D sampling control circuit design method, and gives the A/D sampling control circuit of the V HDL source code and the sample stored in the top-level circuit schematic.
- [VGA_2to2] - VGA Video 2* 2 Distributor drawings, Pro
- [ads7844] - The source of the introduction ADS7844 A
- [test1] - vhdl ADC0809
- [THS1206] - FPGA to realize data acquisition, AD usi
- [MAX125] - max125 is a popular ADC, this is the dri
- [AD] - FPGA control module of the AD7321 is per
- [EP2C5sch] - EP2C5 Core circuit Sch
- [FPGA_AD] - Cyclone EP1C6240C8 FPGA-based interface
- [AD_CNTR4.4a] - The program is vhdl control max125 for a
- [dsp2407caiyangbasedmax125programme] - dsp 2407 cai yang based max125 programme
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基于FPGA高速数据采集系统控制电路的设计.pdf
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