SubDDS generate the sine wave using DSP Builder - CodeBus

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VHDL-FPGA-Verilog

Title: SubDDS

Category:
VHDL-FPGA-Verilog
Tags:
[Matlab] [源码]
File Size:
7kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
luniannianpku

Description: generate the sine wave using DSP Builder

Downloaders recently: [More information of uploader luniannianpku]

To Search: dsp builder SUBDDS sine dsp

[ccssinewave] - package contains ccs development environ
[mp3-dsp] - mp3- dsp the original code that can be u
[Application_in_FPGA_design_of_Matlab_simulink] - Analysis of the MATLAB/Simulink in DSP B
[p8] - 5402 dsp entry process, all through the

File list (Check if you may need any files):

SubDDS.mdl

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