Description: Vhdl code of ppx16 series MCU core, and includes the realization of two MCU- P16C55 and P16F84 according to this core
To Search:
- [VERILOG] - verilog
- [LCD] - The use of FPGA and hardware description
- [xge_mac] - ======================== 10GE MAC Core =
File list (Check if you may need any files):
ppx16
.....\bench
.....\.....\CVS
.....\.....\...\Entries
.....\.....\...\Repository
.....\.....\...\Root
.....\.....\vhdl
.....\.....\....\AsyncLog.vhd
.....\.....\....\AsyncStim.vhd
.....\.....\....\CVS
.....\.....\....\...\Entries
.....\.....\....\...\Repository
.....\.....\....\...\Root
.....\.....\....\StimLog.vhd
.....\.....\....\TestBench55.vhd
.....\.....\....\TestBench84.vhd
.....\CVS
.....\...\Entries
.....\...\Repository
.....\...\Root
.....\rtl
.....\...\CVS
.....\...\...\Entries
.....\...\...\Repository
.....\...\...\Root
.....\...\vhdl
.....\...\....\CVS
.....\...\....\...\Entries
.....\...\....\...\Repository
.....\...\....\...\Root
.....\...\....\P16C55.vhd
.....\...\....\P16F84.vhd
.....\...\....\PPX16.vhd
.....\...\....\PPX_ALU.vhd
.....\...\....\PPX_Ctrl.vhd
.....\...\....\PPX_Pack.vhd
.....\...\....\PPX_PCS.vhd
.....\...\....\PPX_Port.vhd
.....\...\....\PPX_RAM.vhd
.....\...\....\PPX_TMR.vhd
.....\sim
.....\...\CVS
.....\...\...\Entries
.....\...\...\Repository
.....\...\...\Root
.....\...\rtl_sim
.....\...\.......\bin
.....\...\.......\...\CVS
.....\...\.......\...\...\Entries
.....\...\.......\...\...\Repository
.....\...\.......\...\...\Root
.....\...\.......\CVS
.....\...\.......\...\Entries
.....\...\.......\...\Repository
.....\...\.......\...\Root
.....\...\.......\sim
.....\...\.......\...\CVS
.....\...\.......\...\...\Entries
.....\...\.......\...\...\Repository
.....\...\.......\...\...\Root
.....\sw
.....\..\CVS
.....\..\...\Entries
.....\..\...\Repository
.....\..\...\Root
.....\..\hex2rom.cpp
.....\..\xrom.cpp
.....\syn
.....\...\CVS
.....\...\...\Entries
.....\...\...\Repository
.....\...\...\Root
.....\...\xilinx
.....\...\......\bin
.....\...\......\...\CVS
.....\...\......\...\...\Entries
.....\...\......\...\...\Repository
.....\...\......\...\...\Root
.....\...\......\...\p16c55.pin
.....\...\......\...\p16c55.prj
.....\...\......\...\p16c55.scr
.....\...\......\...\p16c55.tcl
.....\...\......\...\p16f84.pin
.....\...\......\...\p16f84.prj
.....\...\......\...\p16f84.scr
.....\...\......\...\p16f84.tcl
.....\...\......\CVS
.....\...\......\...\Entries
.....\...\......\...\Repository
.....\...\......\...\Root
.....\...\......\log
.....\...\......\...\CVS
.....\...\......\...\...\Entries
.....\...\......\...\...\Repository
.....\...\......\...\...\Root
.....\...\......\out
.....\...\......\...\CVS
.....\...\......\...\...\Entries
.....\...\......\...\...\Repository
.....\...\......\...\...\Root
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