Description: Produced by CCD drive TCD1501D driven six output signal RS, CP, SP, SH, and Φ1, Φ2 pulse
- [CCD.USB] - CCD signal acquisition system USB interf
- [ccd-in-verilog] - ALTERA on a number of Verilog CCD proced
- [EPM7256] - CPLD EPM7256 Schematic diagram PCB have
- [CHUANDLG] - VC6 on the linear array CCD image acquis
- [CCD_output_process] - CCD output signal processing, linear arr
- [CCD_DRIVER] - verilog HDL language, linear CCD1501D dr
- [CCD_Application] - CCD photoelectric measuring diameter ins
- [Singlegrab] - exploration program in CCD based in visu
- [DE2_70_LTM_CCD] - A design on a DE270 FPGA with the use of
File list (Check if you may need any files):
ccd.acf
ccd.gdf
ccd.hif
ccd.sym
cpm.acf
cpm.fit
cpm.hif
cpm.mmf
cpm.ndb
cpm.pin
cpm.pof
cpm.rpt
cpm.scf
cpm.snf
CPM.sym
CPm.tdf
CPm.vhd
fpq.acf
fpq.fit
fpq.hif
FPQ.inc
fpq.mmf
fpq.ndb
fpq.pin
fpq.pof
fpq.rpt
fpq.scf
fpq.snf
FPQ.sym
fpq.vhd
LIB.DLS
rsm.acf
rsm.fit
rsm.hif
rsm.mmf
rsm.ndb
rsm.pin
rsm.pof
rsm.rpt
rsm.scf
rsm.snf
RSM.sym
RSm.vhd
rsmm.acf
rsmm.hif
rsmm.mmf
rsmm.vhd
shm.acf
shm.fit
shm.hif
shm.mmf
shm.ndb
shm.pin
shm.pof
shm.rpt
shm.scf
shm.snf
SHM.sym
SHm.vhd
U0714194.DLS
U1044480.DLS
U1227236.DLS
U2420369.DLS
U3330486.DLS
U3438275.DLS
U5552897.DLS
U6071237.DLS
U6584051.DLS
U6889666.DLS
U7200610.DLS
U7484794.DLS
U7502096.DLS
U7624998.DLS
U8831480.DLS
U9350016.DLS
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