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Title: sdram_verilog Download
 Description: sdram use verilog HDL used to achieve operation of the sdram! On the timing and language skills required!
 To Search: SDRAM
  • [FPGA] - SDRAM control module image acquisition s
  • [sdram_0] - SDRAM procedures of the Verilog HDL for
  • [an499_CN] - CPLD control 8-32M sdram controller maxI
  • [PCI32shejicankao] - 32-bit PCI reference design, including t
  • [SDRAM_design_source] - sdram design documents and source code
File list (Check if you may need any files):
sdram_hr_hw
...........\db
...........\Sdram_Control_2Port
...........\...................\command.v
...........\...................\control_interface.v
...........\...................\Sdram_Controller.v
...........\...................\Sdram_Params.h
...........\...................\Sdram_PLL.v
...........\...................\sdr_data_path.v
...........\...................\transcript
...........\SDRAM_HR_HW.asm.rpt
...........\SDRAM_HR_HW.done
...........\SDRAM_HR_HW.dpf
...........\SDRAM_HR_HW.fit.rpt
...........\SDRAM_HR_HW.fit.smsg
...........\SDRAM_HR_HW.fit.summary
...........\SDRAM_HR_HW.flow.rpt
...........\SDRAM_HR_HW.map.rpt
...........\SDRAM_HR_HW.map.smsg
...........\SDRAM_HR_HW.map.summary
...........\SDRAM_HR_HW.pin
...........\SDRAM_HR_HW.pof
...........\SDRAM_HR_HW.qpf
...........\SDRAM_HR_HW.qsf
...........\SDRAM_HR_HW.qsf.bak
...........\SDRAM_HR_HW.sof
...........\SDRAM_HR_HW.tan.rpt
...........\SDRAM_HR_HW.tan.summary
...........\SDRAM_HR_HW.v
...........\SEG7_LUT
...........\........\SEG7_LUT.v
...........\........\SEG7_LUT_8.v
    

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