Description: Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks.
External hardware accelerator is used for network packet processing. The common network tasks include CRC and Checksum calculations that are used for validation of data integrity in the network packets.
The accelerator unit is able to perform a checksum and CRC calculation autonomously without CPU interactions using a build in DMA mechanism.
- [RISC] - 32 bit RISC Processor with 3 stage pipel
- [mipscpu-source] - mips cpu implementation. MIPS is the wor
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CPU_Architecture.doc
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