Description: DW8051 microcontroller design, HDL design, detailed design of the HDL
- [DW8051_2] - DW8051 High-Speed 8051 IP Core, I tested
- [JPGandGIF] - This process includes a picture display
- [sdram_ctrl1] - FPGA to read and write the VHDL procedur
- [dw8051] - this is a dw8051 verilog code,it is veri
File list (Check if you may need any files):
DW8051
......\DW01_add.v
......\DW01_addsub.v
......\DW01_cmp2.v
......\DW01_sub.v
......\DW02_mult.v
......\DW8051
......\......\DW8051_package.inc
......\......\DW8051_parameter.v
......\......\vssver.scc
......\DW8051_alu.v
......\DW8051_biu.v
......\DW8051_control.v
......\DW8051_core.v
......\DW8051_cpu.v
......\DW8051_intr_0.v
......\DW8051_intr_1.v
......\DW8051_main_regs.v
......\DW8051_op_decoder.v
......\DW8051_serial.v
......\DW8051_shftreg.v
......\DW8051_timer.v
......\DW8051_timer2.v
......\DW8051_timer_ctr.v
......\DW8051_updn_ctr.v
......\DW8051_u_ctr_clr.v
DW8051_verilog
..............\DW8051
..............\......\DW01_add.v
..............\......\DW01_addsub.v
..............\......\DW01_cmp2.v
..............\......\DW01_sub.v
..............\......\DW02_mult.v
..............\......\DW8051
..............\......\......\DW8051_package.inc
..............\......\......\DW8051_parameter.v
..............\......\......\vssver.scc
..............\......\DW8051_alu.v
..............\......\DW8051_biu.v
..............\......\DW8051_control.v
..............\......\DW8051_core.v
..............\......\DW8051_cpu.v
..............\......\DW8051_intr_0.v
..............\......\DW8051_intr_1.v
..............\......\DW8051_main_regs.v
..............\......\DW8051_op_decoder.v
..............\......\DW8051_serial.v
..............\......\DW8051_shftreg.v
..............\......\DW8051_timer.v
..............\......\DW8051_timer2.v
..............\......\DW8051_timer_ctr.v
..............\......\DW8051_updn_ctr.v
..............\......\DW8051_u_ctr_clr.v
Download