USB2_0 CY7C68013 and FPGA controller interface Ver - CodeBus

Welcome！[Sign In] ！[Sign Up]！

Front-page it | Collect it | [中国-简体中文]

FAQ Fav

Location:

Embeded-SCM Develop

VHDL-FPGA-Verilog

Title: USB2_0

Category:
VHDL-FPGA-Verilog
Tags:
[PDF]
File Size:
357kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
jyxstar

Description: CY7C68013 and FPGA controller USB2_0 interface VerilogHDL achieve. Rar

Downloaders recently: [More information of uploader jyxstar]

To Search: CY7c68013 FPGA CY7C68013 VHDL 68013

[CY7c68013_FPGA_Read_Sram] - Reading SRAM in the FPGA, then pass on a
[usb_funct.tar] - Verilog language description of the USB
[68013FIFOIN] - Verilog HDL prepared CY7C68013 SLAVE FIF
[DW8051] - Synopsys company DW8051 source code, wri
[usbin_v1.7] - For the CY7C68013 and FPGA communication
[USB_kz] - Cy7C68013 USB chip to provide the develo

File list (Check if you may need any files):

USB2_0控制器CY7C68013与FPGA接口的VerilogHDL实现.pdf

CodeBus www.codebus.net

“CodeBus” is the largest source code store in internet!

1999-2018 CodeBus All Rights Reserved.